MC81F4x16
16.1 Registers
WDTR
WATCHDOG TIMER REGISTER
7
WDTR
WDTCL
00F4H
5
4
R/W
3
WDTCMP
6
R/W
2
R/W
1
R/W
0
Reset value: 7FH
R/W
R/W
R/W
R/W
0: Free-run count
WDTCL
Watchdog Timer Clear Bit
1: When the WDTCL is set to “1”, binary
counter is cleared to “0”. And the WDTCL
becomes “0” automatically after one
machine cycle. Counter count up again.
7-bit compare data
WDTCMP
bit6 – bit0
WDTSR
WATCHDOG TIMER STATUS REGISTER
7
WDTSR
R/W
R/W
R/W
6
5
4
R/W
3
R/W
2
R/W
1
R/W
0
Reset value: 00H
R/W
One byte register
00F6H
Watchdog Timer Function Disable Code
(for System Reset)
10100101: Disable watchdog timer function
Others: Enable watchdog timer function
Figure 16-2 Watchdog Timer Timing
October 19, 2009 Ver.1.35
113
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