FCMJ-8520/8521-3 1000BASE-T SFP Product Specification
F i n i s a r
I.
SFP to Host Connector Pin Out
Pin
Symbol
Name/Description
Note
1
2
VEET
TFAULT
TDIS
Transmitter ground (common with receiver ground)
Transmitter Fault. Not supported
1
3
Transmitter Disable. PHY disabled on high or open
Module Definition 2. Data line for serial ID
Module Definition 1. Clock line for serial ID
Module Definition 0. Grounded within the module
No connection required
2
3
3
3
4
MOD_DEF(2)
MOD_DEF(1)
MOD_DEF(0)
Rate Select
LOS
5
6
7
8
Loss of Signal indication.
4
1
1
1
9
VEER
Receiver ground (common with transmitter ground)
Receiver ground (common with transmitter ground)
Receiver ground (common with transmitter ground)
Receiver Inverted DATA out. AC coupled
Receiver Non-inverted DATA out. AC coupled
Receiver ground (common with transmitter ground)
Receiver power supply
10
11
12
13
14
15
16
17
18
19
20
VEER
VEER
RD-
RD+
VEER
1
1
1
VCCR
VCCT
Transmitter power supply
VEET
Transmitter ground (common with receiver ground)
Transmitter Non-Inverted DATA in. AC coupled
Transmitter Inverted DATA in. AC coupled
Transmitter ground (common with receiver ground)
TD+
TD-
VEET
Notes: 1. Circuit ground is connected to chassis ground
2. PHY disabled on TDIS > 2.0V or open, enabled on TDIS < 0.8V
3. Should be pulled up with 4.7k – 10k Ohms on host board to a voltage between 2.0 V and 3.6 V.
MOD_DEF(0) pulls line low to indicate module is plugged in.
4. LVTTL compatible with a maximum voltage of 2.5V. Not supported on FCMJ-8521-3.
Table 1. SFP to host connector pin assignments and descriptions
VeeT
TD-
20
19
18
17
16
15
14
13
12
11
VeeT
1
2
TXFault
TD+
3
TX Disable
MOD-DEF(2)
MOD-DEF(1)
MOD-DEF(0)
Rate Select
LOS
VeeT
VccT
VccR
VeeR
RD+
RD-
4
5
Towards
Bezel
Towards
ASIC
6
7
8
9
VeeR
VeeR
VeeR
10
Figure 1. Diagram of host board connector block pin numbers and names
Finisar Corporation March 16, 2005 Rev H
Page 2