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FTLX3811M333 参数 Datasheet PDF下载

FTLX3811M333图片预览
型号: FTLX3811M333
PDF下载: 下载PDF文件 查看货源
内容描述: 符合RoHS-6的10Gb / s DWDM 80公里多速率XFP光收发器 [RoHS-6 Compliant 10Gb/s DWDM 80km Multi-Rate XFP Optical Transceiver]
分类和应用: 光纤通信
文件页数/大小: 14 页 / 300 K
品牌: FINISAR [ FINISAR CORPORATION. ]
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FTLX3811M3 DWDM XFP Product Specification – September 2007  
F i n i s a r  
I.  
Pin Descriptions  
Pin  
Logic  
Symbol  
Name/Description  
Ref.  
1
2
3
GND  
VEE5  
Mod-Desel  
Module Ground  
Optional –5.2 Power Supply – Not required  
1
LVTTL-I  
LVTTL-O  
LVTTL-I  
Module De-select; When held low allows the module to  
respond to 2-wire serial interface commands  
Interrupt (bar); Indicates presence of an important condition  
which can be read over the serial 2-wire interface  
Transmitter Disable; Transmitter laser source turned off  
+5 Power Supply  
4
2
1
Interrupt  
5
6
7
TX_DIS  
VCC5  
GND  
Module Ground  
8
9
10  
11  
VCC3  
VCC3  
SCL  
+3.3V Power Supply  
+3.3V Power Supply  
Serial 2-wire interface clock  
Serial 2-wire interface data line  
LVTTL-I  
LVTTL-  
I/O  
2
2
SDA  
12  
13  
LVTTL-O  
Mod_Abs  
Mod_NR  
Module Absent; Indicates module is not present. Grounded  
in the module.  
Module Not Ready; Finisar defines it as a logical OR  
between RX_LOS and Loss of Lock in TX/RX.  
Receiver Loss of Signal indicator  
Module Ground  
2
2
LVTTL-O  
LVTTL-O  
14  
15  
16  
17  
18  
19  
20  
21  
RX_LOS  
GND  
GND  
RD-  
RD+  
GND  
VCC2  
2
1
1
Module Ground  
CML-O  
CML-O  
Receiver inverted data output  
Receiver non-inverted data output  
Module Ground  
1
+1.8V Power Supply  
LVTTL-I  
P_Down/RST Power Down; When high, places the module in the low  
power stand-by mode and on the falling edge of P_Down  
initiates a module reset  
Reset; The falling edge initiates a complete reset of the  
module including the 2-wire serial interface, equivalent to a  
power cycle.  
22  
23  
24  
VCC2  
GND  
RefCLK+  
+1.8V Power Supply  
Module Ground  
Reference Clock non-inverted input, AC coupled on the  
host board – Not required  
Reference Clock inverted input, AC coupled on the host  
board – Not required  
1
PECL-I  
PECL-I  
25  
RefCLK-  
26  
27  
28  
29  
30  
GND  
GND  
TD-  
TD+  
GND  
Module Ground  
Module Ground  
Transmitter inverted data input  
Transmitter non-inverted data input  
Module Ground  
1
1
CML-I  
CML-I  
1
Notes:  
1. Module circuit ground is isolated from module chassis ground within the module.  
2. Open collector; should be pulled up with 4.7k – 10kohms on host board to a voltage between 3.15V  
and 3.6V.  
© Finisar Corporation 28-September-2007  
Rev B2  
Page 3