F71610
Pin No Pin Name Type
PWR
Description
1
D+
I/O12t_1.5k
VDD D+. Different data bus conforming to USB standard. Internal pull
high 1.5kΩ.
2
3
D-
I/O12t
VDD D-. Different data bus conforming to USB standard.
PSOUT#
OD12_5v
VDD Panel Switch Output. This pin is low active and pulse output. It is
power on request output.
4
STATE_SEL INts
VDD This pin is for wake up function.
For Device Product Æ Pull this pin to high for USB wake up.
For MB System Product Æ Pull this pin to high and suggest
connecting pin with one of PWROK/GPIO pin.
MB System in S5 state: Wake up signal will be asserted by
PSOUT# pin in S5 state.
MB System in S3 state: Wake up signal will be asserted by USB
interface in S3 state.
5
6
7
XTALIN/48M INt
VDD 12MHz/48MHz clock input.
VDD 12MHz/48MHz clock output.
XTALOUT
PWCTL
O12
OD12
VDD RX_LR learning power control pin. Suggest external pull high to
3.3V and the clock input source will be selected to 12MHz input.
8
9
GND
P
VDD Ground pin.
SCL (SCK) OD12_5V
VDD I2C interface serial clock
VDD I2C interface serial data
10 SDA
11-12 NC
13 LED#
14 NC
OD12_5V
-
-
NC pins
OD16_5V
VDD LED output pin.
-
-
NC pin. Please pull high 10k resister to VDD.
15 RX_NR#
16 VDD
INts_5v
P
VDD IR receiver port (long range)
VDD Power supply input VDD (3.3V)
-3-
Dec., 2007
V0.22P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
