4.1
Pin No.
4,37
45
Power Pins
Pin Name
3VCC
5VSB(5VA)
Type
P
P
F71869A
Description
Power supply voltage input with 3.3V (Support OVP)
5V stand by power input. Nomally the 5V stand by
power source is from ATX Power directly.
3.3V internal standby power regulates from 5VSB,
couple this pin with capacitor (0.1u) to ground for inter
capacitance compensation. Besides, this pin can be an
output pin to provide little current for Battery
application when system enters ERP (G3’ like) state.
(Detail pleaser refer application circuit)
Battery voltage input
Analog GND
Analog Stand-by power supply voltage input 3.3V
Digital GND
68
I_VSB3V
P
86
88
99
20, 48, 73, 117
VBAT
AGND(D-)
3VSB
GND
P
P
P
P
4.2
Pin No.
29
30
31
32
33-36
38
39
LPC Interface
Pin Name
LRESET#
LDRQ#
SERIRQ
LFRAM#
LAD[0:3]
PCICLK
CLKIN
Type
IN
st,5v
O
16
I/O
16t-u47k
IN
st-u47k
I/O
16t-u47k
IN
st
IN
st
PWR
3VCC
3VCC
3VCC
3VCC
3VCC
3VCC
3VCC
Description
Reset signal. It can connect to PCIRST# signal on the host.
Encoded DMA Request signal.
Serial IRQ input/Output.
Indicates start of a new cycle or termination of a broken
cycle.
These signal lines communicate address, control, and data
information over the LPC bus between a host and a
peripheral.
33MHz PCI clock input.
System clock input. According to the input frequency
24/48MHz.
4.3
Pin No.
FDC
Pin Name
GPIO30
Type
I/OD
14st,5v
OD
14,5v
I/OD
14st,5v
OD
14,5v
I/OD
14st,5v
OD
14,5v
3VCC
PWR
Description
Default General Purpose IO.
Drive Density Select.
Set to 1 - High data rate.(500Kbps, 1Mbps)
Set to 0 – Low data rate. (250Kbps, 300Kbps)
FDC function is selected by register setting.
Default General Purpose IO.
Motor A On. When set to 0, this pin enables disk drive 0.
This is an open drain output.
FDC function is selected by register setting.
Default General Purpose IO.
Drive Select A. When set to 0, this pin enables disk drive A.
12
Oct., 2011
V0.19P
7
DENSEL#
GPIO31
3VCC
3VCC
8
MOA#
GPIO32
DRVA#
9
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
