3 PIN MICROPROCESSOR RESET MONITORS
FSP2200
DETAILED DESCRIPTION
A microprocessor's (MPU) reset input starts the MPU in a known state. The FSP2200 reset to prevent code
execution errors during power-up, power-down, or brownout conditions. They assert a reset signal whenever the
Vcc supply voltage declines below a preset thresh-old, keeping it asserted for at least 140ms after Vcc has risen
above the reset threshold. The FSP2200 push-pull output stage.
APPLICATION INFORMATION
Negative-Going V
CC
Transients
In addition to issuing a reset to the MPU during power-up, power-down, and brownout conditions, the FSP2200 is
relatively immune to short-duration negative-going Vcc transients (glitches). Figure 1 shows typical transient
duration vs. reset comparator overdrive, for which the FSP2200 do not generate a reset pulse. The graph was
generated using a negative going pulse applied to Vcc, starting 0.5V above the actual reset threshold and ending
below it by the magnitude in dicated (reset comparator overdrive). The graph indicates the maximum pulse width a
negative-going Vcc transient can have without causing a reset pulse. As the magnitude of the transient increases
(goes farther below the reset threshold), the maximum allowable pulse width decreases. Typically, for the
FSP2200-4.63/4.38, a Vcc transient that goes 100mV below the reset threshold and lasts 20µs or less will not cause
a reset pulse. A 0.1µF bypass capacitor mounted as close as possible to the VCC pin provides additional transient
immunity.
400
320
240
160
80
0
1
10
100
1000
Reset Comparator Overdrive, V
TH
-Vcc
Figure 1
Figure 2
Ensuring a Valid Reset Output: Down to VCC = 0
When VCC falls below 1V, the FSP2200 RESET output no longer sinks current-it becomes an open circuit.
Therefore, high-impedance CMOS logic input connected to RESET can drift to undetermined voltages. This
presents no problem in most applications since most MPU and other circuitry is inoperative with Vcc below 1V.
However, in applications where RESET must be valid down to 0V, adding a pull-down resistor to RESET causes any
stray leakage currents to flow to ground, holding RESET low Figure 2. R1's value is not critical, 100kΩ is large
enough not to load RESET and small enough to pull RESET to ground
Benefits of Highly Accurate Reset Threshold
Most MPU supervisor ICs have reset threshold voltages between 5% and 10% below the value of nominal supply
voltages. This ensures a reset will not occur within 5% of the nominal supply, but will occur when the supply is 10%
below nominal.
When using ICs rated at only the nominal supply ±5%, this leaves a zone of uncertainty where the supply is between
5% and 10% low, and where the reset may or may not be asserted.
The FSP2200-4.63/3.08/2.32 use highly accurate circuitry to ensure that reset is asserted close to the 5% limit, and
long before the supply has declined to 10% below nominal.
4/7
2007-2-8
FOSLINK [ FOSLINK SEMICONDUCTOR CO.,LTD ]
