for
ETHERNET
3.3V
HCMOS 7 x 5mm
M
odel: FXO-HC735RGB-125
50ppm XO Freq: 125MHz
Dimensional Drawing & Pad Layout
0.01 F
E/D
NC
#1
#4
NC
V
DD
GND
#2
#3
OUT
HCMOS LOAD
(15 pF)
Phase Jitter & Time Interval Error (TIE) (Typical Measurements)
Frequency
125 MHz
Phase Jitter
(12kHz to 20MHz)
TIE
(Sigma of Jitter Distribution)
Units
pS RMS
0.75
2.7
Phase Jitter
is integrated from HP3048 Phase Noise Measurement System; measured directly into 50 ohm input; V
DD
= 3.3V.
TIE
was measured on LeCroy LC684 Digital Storage Scope, directly into 50 ohm input, with Amherst M1 software; V
DD
= 3.3V.
Per
MJSQ
spec (Methodologies for Jitter and Signal Quality specifications)
Random & Deterministic Jitter Composition (Typical Measurements)
Frequency
125 MHz
Random (Rj)
(pS RMS)
Deterministic (Dj)
(pS P-P)
Total Jitter (Tj)
(14 x Rj) + Dj
25.2 pS
1.20
8.0
Rj and Dj
, measured on LeCroy LC684 Digital Storage Scope, directly into 50 ohm input, with Amherst M1 software.
Per
MJSQ
spec (Methodologies for Jitter and Signal Quality specifications)
Pin Functional Description
Pin #
1
2
3
4
Test
Points
Name
E/D
GND
Output
V
DD
2
N. C.
1
2
1
Type
Logic
Ground
Output
Power
Hi Z
Function
Enable / Disable Control of Output (0 = Disabled)
Electrical Ground for V
DD
HCMOS Oscillator Output
Power Supply Source Voltage
No Connection (Factory Use ONLY)
NOTES:
Includes pull-up resistor to V
DD
to provide output when the pin (1) is No Connect.
Installation should include a 0.01µF bypass capacitor placed between V
DD
(Pin 4) and GND (Pin 2) to minimize power supply line noise.
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DWG-100717 |
Rev. 6/2/2010
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