MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State Noninverting
Buffer/Line Driver/
Line Receiver
High–Performance Silicon–Gate CMOS
The MC54/74HC244A is identical in pinout to the LS244. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
This octal noninverting buffer/line driver/line receiver is designed to be
used with 3–state memory address drivers, clock drivers, and other
bus–oriented systems. The device has noninverting outputs and two
active–low output enables.
The HC244A is similar in function to the HC240A and HC241A.
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•
•
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Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1
µA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
•
Chip Complexity: 136 FETs or 34 Equivalent Gates
MC54/74HC244A
J SUFFIX
CERAMIC PACKAGE
CASE 732–03
1
20
20
1
20
1
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
DW SUFFIX
SOIC PACKAGE
CASE 751D–04
SD SUFFIX
SSOP PACKAGE
CASE 940C–03
DT SUFFIX
TSSOP PACKAGE
CASE 948E–02
20
1
20
1
ORDERING INFORMATION
Ceramic
MC54HCXXXAJ
Plastic
MC74HCXXXAN
SOIC
MC74HCXXXADW
SSOP
MC74HCXXXASD
TSSOP
MC74HCXXXADT
LOGIC DIAGRAM
2
4
6
8
11
13
15
17
18
16
14
12
9
7
5
3
A1
A2
A3
A4
DATA
INPUTS
B1
B2
B3
B4
YA1
YA2
YA3
YA4
YB1
YB2
YB3
YB4
NONINVERTING
OUTPUTS
PIN ASSIGNMENT
ENABLE A
A1
YB4
A2
YB3
A3
YB2
A4
YB1
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
ENABLE B
YA1
B4
YA2
B3
YA3
B2
YA4
B1
FUNCTION TABLE
OUTPUT
ENABLES
1
ENABLE A
19
ENABLE B
PIN 20 = VCC
PIN 10 = GND
Inputs
Enable A,
Enable B
L
L
H
A, B
L
H
X
Outputs
YA, YB
L
H
Z
Z = high impedance
2/97
©
Motorola, Inc. 1997
1
REV 7
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
