MOTOROLA
Freescale Semiconductor, Inc.
SEMICONDUCTOR TECHNICAL DATA
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DSP56004/D, Rev. 3
DSP56004
DSP56004ROM
SYMPHONY
™
AUDIO DSP FAMILY
24-BIT DIGITAL SIGNAL PROCESSORS
Motorola designed the Symphony™ family of high-performance, programmable Digital Signal
Processors (DSPs) to support a variety of digital audio applications, including Dolby ProLogic,
ATRAC, and Lucasfilm Home THX processing. Software for these applications is licensed by
Motorola for integration into products like audio/video receivers, televisions, and automotive
sound systems with such user-developed features as digital equalization and sound field
processing. The DSP56004 is an MPU-style general purpose DSP, composed of an efficient 24-bit
Digital Signal Processor core, program and data memories, various peripherals optimized for
audio, and support circuitry. As illustrated in
, the DSP56000 core family compatible
DSP is fed by program memory, two independent data RAMs and two data ROMs, a Serial
Audio Interface (SAI), Serial Host Interface (SHI), External Memory Interface (EMI), dedicated
I/O lines, on-chip Phase Lock Loop (PLL), and On-Chip Emulation (OnCE
™
) port.
4
General
Purpose
Input/
Output
Freescale Semiconductor, Inc...
9
Serial
Audio
Interface
(SAI)
5
Serial
Host
Interface
(SHI)
29
External
Memory
Interface
(EMI)
16-Bit Bus
24-Bit Bus
Program
Memory*
X Data
Memory*
Y Data
Memory*
24-Bit
DSP56000
Core
Address
Generation
Unit
PAB
XAB
YAB
GDB
Internal
Data
Bus
Switch
PDB
XDB
YDB
OnCE
TM
Port
Clock
Gen.
Interrupt
Control
Program
Decode
Controller
Program Control Unit
Program
Address
Generator
PLL
Data ALU
24
×
24 + 56
→
56-bit MAC
Two 56-Bit Accumulators
3
4
4
IRQA
,
IRQB, NMI
,
RESET
*Refer to Table 1 for memory configurations.
AA0248
Figure 1
DSP56004 Block Diagram
©1996, 1997 MOTOROLA, INC.
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