FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The 34701 power supply integrated circuit provides the
means to efficiently supply the Freescale Power QUICC and
other families of Freescale microprocessors. It incorporates a
high-performance synchronous buck regulator, supplying the
microprocessor’s core, and a low dropout (LDO) linear
regulator providing the microprocessor I/O and bus voltages.
This device incorporates many advanced features; e.g.,
precisely maintained up/down power sequencing, ensuring
the proper operation and protection of the CPU and power
system. At the same time, it provides high flexibility of
configuration, allowing the maximum optimization of the
power supply system.
FUNCTIONAL TERMINAL DESCRIPTION
OSCILLATOR FREQUENCY TERMINAL (FREQ)
BOOTSTRAP TERMINAL (BOOT)
This switcher frequency selection terminal can be adjusted
by connecting external resistor RF to the FREQ terminal. The
default switching frequency (FREQ terminal left open or tied
to VDDI) is set to 300 kHz.
Bootstrap capacitor input.
SERIAL DATA TERMINAL (SDA)
I2C bus terminal. Serial data.
INVERTING INPUT TERMINAL (INV)
SERIAL CLOCK TERMINAL (SCL)
Buck Controller Error Amplifier inverting input.
I2C bus terminal. Serial clock.
OUTPUT VOLTAGE TERMINAL (VOUT)
Output voltage of the buck converter. Input terminal of the
switching regulator power sequence control circuit.
LINEAR COMPENSATION TERMINAL (LCMP)
Linear regulator compensation terminal.
INPUT VOLTAGE 2 TERMINALS (VIN2)
LINEAR FEEDBACK TERMINAL (LFB)
Buck regulator power input. Drain of the high-side power
MOSFET.
Linear regulator feedback terminal.
SWITCH TERMINALS (SW)
LINEAR REGULATOR TERMINAL (LDO)
Buck regulator switching node. This terminal is connected
to the inductor.
Input terminal of the linear regulator power sequence
control circuit.
GROUND TERMINALS (GND)
CURRENT SENSE TERMINAL (CS)
Analog ground of the IC, thermal heatsinking.
Current sense terminal of the LDO. Overcurrent protection
of the linear regulator external power MOSFET. The voltage
drop over the LDO current sense resistor RS is sensed
between the CS and LDO terminals. The LDO current limit
can be adjusted by selecting the proper value of the current
sensing resistor RS.
POWER GROUND TERMINALS (PGND)
Buck regulator power ground.
BOOST DRAIN TERMINAL (VBD)
Drain of the internal boost regulator power MOSFET.
LINEAR DRIVE TERMINAL (LDRV)
BOOST VOLTAGE TERMINAL (VBST)
LDO gate drive of the external pass N-channel MOSFET.
Internal boost regulator output voltage. The internal boost
regulator provides a 20 mA output current to supply the drive
circuits for the integrated power MOSFETs and the external
N-channel power MOSFET of the linear regulator. The
voltage at the VBST terminal is 7.75V nominal.
INPUT VOLTAGE 1 TERMINAL (VIN1)
The input supply terminal for the integrated circuit. The
internal circuits of the IC are supplied through this terminal.
34701
Analog Integrated Circuit Device Data
Freescale Semiconductor
15
FREESCALE [ Freescale ]
