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MC145201F 参数 Datasheet PDF下载

MC145201F图片预览
型号: MC145201F
PDF下载: 下载PDF文件 查看货源
内容描述: 2.0 GHz的PLL频率合成器 [2.0 GHz PLL Frequency Synthesizers]
分类和应用: 光电二极管
文件页数/大小: 23 页 / 334 K
品牌: FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MC145200/D
2.0 GHz PLL Frequency
Synthesizers
MC145200
MC145201
Include On–Board 64/65 Prescalers
The MC145200 and MC145201 are single–package synthesizers with serial
interfaces capable of direct usage up to 2.0 GHz. A special architecture makes
these PLLs very easy to program because a byte–oriented format is utilized.
Due to the patented BitGrabber™ registers, no address/steering bits are
required for
random access
of the three registers. Thus, tuning can be
accomplished via a 3–byte serial transfer to the 24–bit A register. The interface
is both SPI and MICROWIRE™ compatible.
Each device features a single–ended current source/sink phase detector
output and a double–ended phase detector output. Both phase detectors have
linear transfer functions (no dead zones). The maximum current of the
single–ended phase detector output is determined by an external resistor tied
from the Rx pin to ground. This current can be varied via the serial port.
The MC145200 features logic–level converters and high–voltage phase/
frequency detectors; the detector supply may range up to 9.5 V. The MC145201
has lower–voltage phase/frequency detectors optimized for single–supply
systems of 5 V
±10%.
Each part includes a differential RF input which may be operated in a
single–ended mode. Also featured are on–board support of an external crystal
and a programmable reference output. The R, A, and N counters are fully
programmable. The C register (configuration register) allows the parts to be
configured to meet various applications. A patented feature allows the C
register to shut off unused outputs, thereby minimizing system noise and
interference.
In order to have consistent lock times and prevent erroneous data from being
loaded into the counters, on–board circuitry synchronizes the update of the A
register if the A or N counters are loading. Similarly, an update of the R register
is synchronized if the R counter is loading.
The double–buffered R register allows new divide ratios to be presented to
the three counters (R, A, and N) simultaneously.
Maximum Operating Frequency: 2000 MHz @ Vin = 200 mV p–p
Operating Supply Current: 12 mA Nominal
Operating Supply Voltage Range (VDD and VCC Pins): 4.5 to 5.5 V
Operating Supply Voltage Range of Phase Detectors (VPD Pin) —
MC145200: 8.0 to 9.5 V
MC145201: 4.5 to 5.5 V
Current Source/Sink Phase Detector Output Capability: 2 mA Maximum
Gain of Current Source/Sink Phase/Frequency Detector Controllable via
Serial Port
Operating Temperature Range: – 40 to + 85°C
R Counter Division Range: (1 and) 5 to 8191
Dual–Modulus Capability Provides Total Division up to 262,143
High–Speed Serial Interface: 4 Mbps
OUTPUT A Pin, When Configured as Data Out, Permits Cascading of Devices
Two General–Purpose Digital Outputs — OUTPUT A: Totem–Pole (Push–Pull)
OUTPUT B: Open–Drain
Power–Saving Standby Feature with Orderly Recovery for Minimizing Lock
Times, Standby Current: 30
µA
Evaluation Kit Available (Part Numbers MC145200EVK and MC145201EVK)
See Application Note AN1253/D for Low–Pass Filter Design, and
AN1277/D for Offset Reference PLLs for Fine Resolution or Fast Hopping
20
F SUFFIX
SOG PACKAGE
CASE 751J
1
20
1
DT SUFFIX
TSSOP
CASE 948D
ORDERING INFORMATION
MC145200F
MC145201F
MC145200DT
MC145201DT
SOG Package
SOG Package
TSSOP
TSSOP
PIN ASSIGNMENT
REFout
LD
φ
R
φ
V
VPD
PDout
GND
Rx
TEST 1
fin
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
REFin
Din
CLK
ENB
OUTPUT A
OUTPUT B
VDD
TEST 2
VCC
fin
BitGrabber is a trademark of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.
REV 4
1/98
TN98012300
©
Motorola, Inc. 1998
MOTOROLA
MC145200•MC145201
1