Chapter 10
Input/Output (I/O) Ports
10.1 Introduction
Twenty three (23) bidirectional input-output (I/O) pins form three parallel ports. All I/O pins are
programmable as inputs or outputs.
NOTE
Connect any unused I/O pins to an appropriate logic level, either V
DD
or V
SS
.
Although the I/O ports do not require termination for proper operation,
termination reduces excess current consumption and the possibility of
electrostatic damage.
20-pin devices have non-bonded pins. These pins should be configured
either as outputs driving low or high, or as inputs with internal pullups
enabled. Configuring these non-bonded pins in this manner will prrevent
any excess current compsumption caused by floating inputs.
Addr.
$0000
Register Name
Read:
Port A Data Register
Write:
(PTA)
Reset:
Read:
Port B Data Register
Write:
(PTB)
Reset:
Read:
$0003
Port D Data Register
Write:
(PTD)
Reset:
Read:
Data Direction Register A
Write:
(DDRA)
Reset:
Read:
Data Direction Register B
Write:
(DDRB)
Reset:
Read:
Data Direction Register D
Write:
(DDRD)
Reset:
Bit 7
0
6
PTA6
5
PTA5
4
PTA4
3
PTA3
2
PTA2
1
PTA1
Bit 0
PTA0
Unaffected by reset
PTB7
PTB6
PTB5
PTB4
PTB3
PTB2
PTB1
PTB0
$0001
Unaffected by reset
PTD7
PTD6
PTD5
PTD4
PTD3
PTD2
PTD1
PTD0
Unaffected by reset
0
0
DDRB7
0
DDRD7
0
DDRA6
0
DDRB6
0
DDRD6
0
DDRA5
0
DDRB5
0
DDRD5
0
DDRA4
0
DDRB4
0
DDRD4
0
DDRA3
0
DDRB3
0
DDRD3
0
DDRA2
0
DDRB2
0
DDRD2
0
DDRA1
0
DDRB1
0
DDRD1
0
DDRA0
0
DDRB0
0
DDRD0
0
$0004
$0005
$0007
Figure 10-1. I/O Port Register Summary
MC68HC908JL3E Family Data Sheet, Rev. 4
Freescale Semiconductor
103