Freescale Semiconductor, Inc.
constant can cause the device to misinterpret the type of reset that occurred. Refer to
SECTION 5 RESETS AND INTERRUPTS for further information.
Figure 2-3 illustrates a reset circuit that uses an external switch. Use a low voltage
interrupt circuit, however, to prevent corruption of RAM.
V
V
DD
DD
2
4.7 kΩ
IN
1
TO RESET
OF M68HC11
RESET
MC34(0/1)64
GND
3
EXT RESET CIRCUIT
Figure 2-3 External Reset Circuit
2.3 Crystal Driver and External Clock Input (XTAL, EXTAL)
These two pins provide the interface for either a crystal or a CMOS compatible clock
to control the internal clock generator circuitry. The frequency applied to these pins is
four times higher than the desired E-clock rate.
The XTAL pin is normally left unterminated when an external CMOS compatible clock
input is connected to the EXTAL pin. However, a 10 kΩ to 100 kΩ load resistor con-
nected from XTAL to ground can be used to reduce RFI noise emission. The XTAL
output is normally intended to drive only a crystal. The XTAL output can be buffered
with a high impedance buffer, or it can be used to drive the EXTAL input of another
M68HC11.
In all cases, use caution around the oscillator pins. Load capacitances shown in the
oscillator circuits include all stray layout capacitances. Refer to Figure 2-4, Figure 2-
5, and Figure 2-6.
25 pF *
EXTAL
10 MΩ
4 x E
CRYSTAL
MCU
25 pF *
XTAL
* THIS VALUE INCLUDES ALL STRAY CAPACITANCES.
COMMON XTAL CONN
Figure 2-4 Common Crystal Connections
PIN DESCRIPTIONS
TECHNICAL DATA
2-3
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