Freescale Semiconductor, Inc.
Central Processor Unit (CPU)
8.7 CPU During Break Interrupts
If the break module is enabled, a break interrupt causes the CPU to
execute the software interrupt instruction (SWI) at the completion of the
current CPU instruction. See
The program
counter vectors to $FFFC–$FFFD ($FEFC–$FEFD in monitor mode).
A return-from-interrupt instruction (RTI) in the break routine ends the
break interrupt and returns the MCU to normal operation if the break
interrupt has been deasserted.
Freescale Semiconductor, Inc...
8.8 Instruction Set Summary
provides a summary of the M68HC08 instruction set.
Technical Data
Central Processor Unit (CPU)
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MC68HC908AS60 — Rev. 1.0
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