Freescale Semiconductor, Inc.
Monitor ROM (MON)
13.4.3 Echoing
As shown in Figure 13-4, the MON immediately echoes each received
byte back to the PTA0 pin for error checking.
Any result of a command appears after the echo of the last byte of the
command.
SENT TO
MONITOR
READ
READ
ADDR. HIGH
ADDR. HIGH
ADDR. LOW
ADDR. LOW
DATA
ECHO
RESULT
Figure 13-4. Read Transaction
13.4.4 Break Signal
A start bit followed by nine low bits is a break signal. See Figure 13-5.
When the monitor receives a break signal, it drives the PTA0 pin high for
the duration of two bits before echoing the break signal.
MISSING STOP BIT
TWO-STOP-BIT DELAY BEFOREZERO ECHO
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Figure 13-5. Break Transaction
Technical Data
MC68HC908AS60 — Rev. 1.0
Monitor ROM (MON)
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