Chapter 1 Device Overview
HCS08 CORE
DEBUG
MODULE (DBG)
CYCLIC REDUNDANCY
CHECK MODULE (CRC)
PORT A
BKGD/MS
BDC
CPU
RESET
HCS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
RTI
IRQ
COP
LVD
INTERNAL CLOCK
GENERATOR (ICG)
PORT B
LOW-POWER OSC
EXTAL
XTAL
PTA7
PTA6
PTA5
PTA4
PTA3
PTA2
PTA1
PTA0
PTB7/AD1P7
PTB6/AD1P6
PTB5/AD1P5
PTB4/AD1P4
PTB3/AD1P3
PTB2/AD1P2
PTB1/TPM3CH1/AD1P1
PTB0/TPM3CH0/AD1P0
PTC6
PTC5/RxD2
PTC4
PTC3/TxD2
PTC2/MCLK
PTC1/SDA1
PTC0/SCL1
PTD7/KBI1P7/AD1P15
PTD6/TPM1CLK/AD1P14
PTD5/AD1P13
PTD4/TPM2CLK/AD1P12
PTD3/KBI1P6/AD1P11
PTD2/KBI1P5/AD1P10
PTD1/AD1P9
PTD0/AD1P8
PTE7/SPSCK1
PTE6/MOSI1
PTE5/MISO1
PTE4/SS1
RQ/TPMCLK
8-BIT KEYBOARD
INTERRUPT MODULE (KBI1)
KBI1P7–KBI1P0
V
DDAD
V
SSAD
V
REFL
V
REFH
USERMEMORY
FLASH, RAM
(BYTES)
(AW128 = 128K, 8K)
(AW96 = 96K, 6K)
V
DD
V
SS
PTJ7
PTJ6
PTJ5
PTJ4
PTJ3
PTJ2
PTJ1
PTJ0
PTH6/MISO2
VOLTAGE REGULATOR
IIC MODULE (IIC1)
SCL
SDA
SERIAL COMMUNICATIONS
INTERFACE MODULE (SCI1)
SERIAL COMMUNICATIONS
INTERFACE MODULE (SCI2)
RXD1
TXD1
RXD2
TXD2
SPSCK1
MOSI1
MISO1
SS1
SPSCK2
MOSI2
MISO2
TPM1CLK or TPMCLK
TPM1CH0–TPM1CH5
TPM2CLK or TPMCLK
PORT F
TPM2CH0–TPM2CH5
TPMCLK
TPM3CH1
TPM3CH0
PORT D
PORT E
PORT J
SERIAL PERIPHERAL
INTERFACE MODULE (SPI1)
SERIAL PERIPHERAL
INTERFACE MODULE (SPI2)
PORT H
PTH5/MOSI2
PORT C
10-BIT
ANALOG-TO-DIGITAL
CONVERTER (ADC)
AD1P15–AD1P0
PTH4/SPSCK2
PTH3/TPM2CH5
PTH2/TPM2CH4
PTH1/TPM2CH3
PTH0/TPM2CH2
PTG6/EXTAL
PTG5/XTAL
PTG4/KBI1P4
PTG3/KBI1P3
PTG2/KBI1P2
PTG1/KBI1P1
PTG0/KBIP0
6-CHANNEL TIMER/PWM
MODULE (TPM1)
PTE3/TPM1CH1
PTE2/TPM1CH0
PTE1/RxD1
PTE0/TxD1
PTF7
PTF6
PTF5/TPM2CH1
PTF4/TPM2CH0
PTF3/TPM1CH5
PTF2/TPM1CH4
PTF1/TPM1CH3
PTF0/TPM1CH2
PORT G
6-CHANNEL TIMER/PWM
MODULE (TPM2)
2-CHANNEL TIMER/PWM
MODULE (TPM3)
- Pin not connected in 64-pin and 48-pin packages
- Pin not connected in 48-pin package
Figure 1-1. MC9S08AC128 Series Block Diagram
MC9S08AC128 MCU Series Data Sheet, Rev. 2
4
Freescale Semiconductor
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
