Features
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— 1- or 8-bit resolution
— Allows independent transmit and receive routing, frame synchronization, and clocking
— Allows dynamic changes
— Can be internally connected to four serial channels (two SCCs and two SMCs)
Parallel interface port (PIP)
— Centronics interface support
— Supports fast connection between compatible ports on MPC885/880 and other MPC8xx devices
PCMCIA interface
— Master (socket) interface, release 2.1-compliant
— Supports two independent PCMCIA sockets
— 8 memory or I/O windows supported
Debug interface
— Eight comparators: four operate on instruction address, two operate on data address, and two operate on
data
— Supports conditions: =
≠
< >
— Each watchpoint can generate a break point internally.
Normal high and normal low power modes to conserve power
1.8-V core and 3.3-V I/O operation
The MPC885/880 comes in a 357-pin ball grid array (PBGA) package.
MPC885/MPC880 Hardware Specifications, Rev. 3
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Freescale Semiconductor