欢迎访问ic37.com |
会员登录 免费注册
发布采购

MPC885ZP66 参数 Datasheet PDF下载

MPC885ZP66图片预览
型号: MPC885ZP66
PDF下载: 下载PDF文件 查看货源
内容描述: 硬件规格 [Hardware Specifications]
分类和应用:
文件页数/大小: 92 页 / 1505 K
品牌: FREESCALE [ Freescale ]
 浏览型号MPC885ZP66的Datasheet PDF文件第6页浏览型号MPC885ZP66的Datasheet PDF文件第7页浏览型号MPC885ZP66的Datasheet PDF文件第8页浏览型号MPC885ZP66的Datasheet PDF文件第9页浏览型号MPC885ZP66的Datasheet PDF文件第11页浏览型号MPC885ZP66的Datasheet PDF文件第12页浏览型号MPC885ZP66的Datasheet PDF文件第13页浏览型号MPC885ZP66的Datasheet PDF文件第14页  
Thermal Characteristics  
4 Thermal Characteristics  
Table 4 shows the thermal characteristics for the MPC885/880.  
Table 4. MPC885/880 Thermal Resistance Data  
Environment  
Single-layer board (1s)  
Rating  
Symbol  
Value  
Unit  
2
Junction-to-ambient 1  
Natural convection  
RθJA  
37  
25  
30  
22  
17  
10  
2
°C/W  
3
Four-layer board (2s2p)  
Single-layer board (1s)  
Four-layer board (2s2p)  
RθJMA  
3
Airflow (200 ft/min)  
RθJMA  
3
RθJMA  
Junction-to-board 4  
RθJB  
RθJC  
ΨJT  
5
Junction-to-case  
Junction-to-package top 6  
Natural convection  
Airflow (200 ft/min)  
ΨJT  
2
1 Junction temperature is a function of on-chip power dissipation, package thermal resistance, mounting site (board)  
temperature, ambient temperature, airflow, power dissipation of other components on the board, and board thermal  
resistance.  
2 Per SEMI G38-87 and JEDEC JESD51-2 with the single-layer board horizontal.  
3 Per JEDEC JESD51-6 with the board horizontal  
4 Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is  
measured on the top surface of the board near the package.  
5 Indicates the average thermal resistance between the die and the case top surface as measured by the cold plate  
method (MIL SPEC-883 Method 1012.1) with the cold plate temperature used for the case temperature. For exposed  
pad packages where the pad would be expected to be soldered, junction-to-case thermal resistance is a simulated  
value from the junction to the exposed pad without contact resistance.  
6 Thermal characterization parameter indicating the temperature difference between package top and the junction  
temperature per JEDEC JESD51-2.  
5 Power Dissipation  
Table 5 provides information on power dissipation. The modes are 1:1, where CPU and bus speeds are equal, and  
2:1, where CPU frequency is twice bus speed.  
Table 5. Power Dissipation (PD)  
Bus  
Mode  
CPU  
Frequency  
Die Revision  
Typical 1  
Maximum 2  
Unit  
66 MHz  
80 MHz  
133 MHz  
310  
350  
430  
390  
430  
495  
mW  
mW  
mW  
1:1  
2:1  
0
1 Typical power dissipation at VDDL = VDDSYN = 1.8 V, and VDDH is at 3.3 V.  
MPC885/MPC880 Hardware Specifications, Rev. 3  
10  
Freescale Semiconductor