• High-speed interfaces (not all available
simultaneously)
Security Engine
The QorIQ security engine (SEC) is optimized
Dual FlexCAN controllers
Two FlexCAN (revision 2.0B) controllers provide
Six SerDes to 3.125 GHz multiplexed
across controllers
to handle all the algorithms associated with
IPSec, IEEE Std. 802.11i™ standard, and iSCSI. protocols. Each FlexCAN controller has the
a standard interface for implementing industrial
Two PCI Express controllers
Two SGMII interfaces
Two SATA interfaces
The security engine also supports booting to a
known good state, untamperable boot code,
key storage, I/O protection, and secure debug.
following features:
• Programmable bit rates up to 1 Mb/s
• Standard data and remote frames
• Extended data and remote frames
• Up to eight bytes data length
• One USB controller (USB 2.0) with
integrated PHY, host, OTG and device
support
The SEC is a modular and scalable security
core optimized to process all the algorithms
associated with IPsec, IKE, SSL/TLS,
• Serial peripheral interface
• Up to 64 message buffers (MB), each
configurable as Rx or Tx
iSCSI, SRTP, IEEE Std. 802.11i™, IEEE Std.
802.16™ (WiMAX), and IEEE Std. 802.1AE
(MACSec). The SEC is designed to perform
multi-algorithmic operations (for example,
3DES-HMAC-SHA-1) in a single pass of the
data. The security coprocessor in the QorIQ
P1010 processor is capable of performing
single-pass security cryptographic processing
for SSL 3.0, SSL 3.1/TLS 1.0, IPSec, SRTP,
and IEEE Std. 802.11i.
• Trusted boot platform, integrated security
engine (SEC 4.0)
• Individual Rx mask registers per message
buffers
Crypto algorithm support includes
3DES, AES, RSA/ECC, MD5/
SHA, ARC4, Snow 3G and FIPS
deterministic RNG
• Rx FIFO with storage capacity of six frames
and internal pointer handling
• Rx FIFO ID filtering
Single pass encryption/message
authentication for common security
protocols (IPsec, SSL, SRTP, WiMAX)
• Time stamp based on 16-bit free running
timer
XOR acceleration
Technical Specifications
• Single e500 core, built on Power
Architecture® technology
SEC Features
• 16/32-bit DDR3/DDR3L SDRAM memory
controller with ECC support
• XOR engine for parity checking in RAID
storage applications
• Four-channel DMA controller
• Two I2C controllers, two DUARTs, timers
36-bit physical addressing
• Four crypto-channels, each supporting
multi-command descriptor chains
Double-precision floating-point support
• Integrated flash controller with enhanced
capabilities to support large pages
32 KB L1 instruction cache and 32 KB
L1 data cache
Cryptographic Execution Units:
• PKHA (public key hardware accelerator)
• DESA (DES accelerator)
• 32 general-purpose I/O signals
533 MHz to 800 MHz core clock
frequency
• Package: 425-pin TEPBGA1, 0.8 mm pitch,
19 mm x 19 mm
• 256 KB L2 cache with ECC, also
configurable as SRAM and stashing
memory
• AESA (AES accelerator)
Software and Tools Support
• Enea®: Real-time operating system support
• MDHA (message digest hardware
accelerator)
• Three 10/100/1000 Mb/s enhanced three-
speed Ethernet controllers (eTSECs)
• Green Hills®: Complete portfolio of
• RNG (random number generator)
software and hardware development tools,
trace tools and real-time operating systems
TCP/IP acceleration and classification
capabilities
IEEE® 1588 support
Lossless flow control
RGMII, SGMII
• AFHA (ARC four hardware accelerator)
• STHA (SNOW 3G f8 and f9 hardware
accelerators)
• Mentor Graphics®: Commercial grade Linux®
solution
• CRCA (cyclic redundancy check
accelerator)
• P1010 reference design board (RDB)
• KFHA (Kasumi hardware accelerator)
QorIQ P1010 and P1014 Comparison
QorIQ Device
Top Core Frequency
L2 Size
DDR 3 Support
GE Ports
SATA
PCI Express®
Security
CAN
P1010
P1014
1000 MHz
800 MHz
256 KB
256 KB
16/32-bit @ 800 MHz
16-bit @ 800 MHz
3
2
2
2
2
2
Trusted
No
2
No
For more information about QorIQ products, visit freescale.com/QorIQ
Freescale, the Freescale logo, PowerQUICC and QorIQ are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off.
All other product or service names are the property of their respective owners. The Power Architecture and Power.org word marks
and the Power and Power.org logos and related marks are trademarks and service marks licensed by Power.org.
© 2010, 2013 Freescale Semiconductor, Inc.
Document Number: QP1010FS REV 1
FREESCALE [ Freescale ]
