Freescale Semiconductor
Data Sheet
MPC5200
Rev. 4, 01/2005
MPC5200 Data Sheet
NOTE
The information in this
document is subject to
change. For the latest data
on the MPC5200, visit
www.freescale.com and
proceed to the MPC5200
Product Summary Page.
Table of Contents
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Characteristics . . . . . . . . . . . . . . . . . . . . . . . 12
supply filtering . . . . . . . . . . . . . . . . . . . . . . . 73
1
Overview
The MPC5200 integrates a high performance MPC603e
series G2_LE core with a rich set of peripheral functions
focused on communications and systems integration.
The G2_LE core design is based on the PowerPC
TM
core
architecture. MPC5200 incorporates an innovative
BestComm I/O subsystem, which isolates routine
maintenance of peripheral functions from the embedded
G2_LE core. The MPC5200 contains a SDRAM/DDR
Memory Controller, a flexible External Bus Interface,
PCI Controller, USB, ATA, Ethernet, six Programmable
Serial Controllers (PSC), I
2
C, SPI, CAN, J1850, Timers,
and GPIOs.
“Definitive Data: Freescale reserves the right to change the production detail specifications
as may be required to permit improvements in the design of its products.”
© Freescale Semiconductor, Inc., 2005, 2006. All rights reserved.
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