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SWSO-02 参数 Datasheet PDF下载

SWSO-02图片预览
型号: SWSO-02
PDF下载: 下载PDF文件 查看货源
内容描述: 2 “×2”振荡器:双通道和正交 [2” X 2” Oscillators: Dual Channel & Quadrature]
分类和应用: 振荡器
文件页数/大小: 4 页 / 280 K
品牌: FREQUENCYDEVICES [ FREQUENCY DEVICES, INC. ]
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SPPOSC Series
2” X 2”
(Low Distortion) 1 Hz to 102.4 kHz
8 or 9-Bit Frequency Selectable
Frequency Selection Data Port
Data Format
Logic “0”
Logic “1”
Oscillators: Dual Channel
& Quadrature
9-Bit Programming Table
0VDC Min – 2VDC Max
3.5VDC Min – 5Vdc Max
MSB
2
8
D
8
0
0
0
0
0
0
0
0
0
1
---
2
7
D
7
0
0
0
0
0
0
0
0
1
1
---
2
6
D
6
0
0
0
0
0
0
0
1
1
1
---
2
5
D
5
0
0
0
0
0
0
1
1
1
1
---
2
4
D
4
0
0
0
0
0
1
1
1
1
1
---
2
3
D
3
0
0
0
0
1
1
1
1
1
1
---
2
2
D
2
0
0
0
1
1
1
1
1
1
1
---
2
1
D
1
0
0
1
1
1
1
1
1
1
1
LSB
2
0
D
0
0
1
1
1
1
1
1
1
1
1
Bit
Weight
f
c
Corner
Frequency
f
max
/512
f
max
/256
f
max
/128
f
max
/64
f
max
/32
f
max
/16
f
max
/8
f
max
/4
f
max
/2
f
max
Bit Weighting (Binary Coded)
LSB
D
0
MSB
D
7
or D
8
(for 9-bits)
Frequency: 256:1 (8-bit dual),
or 512:1 (9-bit single)
____________________________________________
1. The frequency selection data word bus consists of
D
0
to D
7
for 8-bit programming and D
0
to D
8
for 9-bit
programming.
2. For dual Channel 8-Bit programming D
8
is Channel
Select and requires a minimum of 21 µsecs set-up
time at a logic “1”, 5volts for channel 2 or logic “0”, 0
volts, for Channel 1
3. For an 8-bit dual channel unit, the Program enable
or “Latch pin” is D
9
. To enable a program change,
this pin must be pulled to a logic high “1” or 5 volts.
If the pin is low, a frequency change will not be read
and the channels will continue to run the previous
values.
8-Bit Programming Table
4.
The D
0
– D
9
bus data are checked simultaneously.
New frequency selection data must be present or
updated at the time Channel select occurs to be
valid. The Program enable or “Latch” pin must be
high. While the latch pin is high, the Frequency data
must remain on the bus until the user applies the
next frequency change. The pins do not float during
programming! The frequency ports are polled by the
system every 21 µseconds. Within 21 µsecs of
programming, if the latch goes low, the programmed
values are retained and the pins may float.
D
9
Enable/Latch
D
8
Ch Sel
D
0
to D
7
Frequency
Select
MSB
2
7
D
7
0
0
0
0
0
0
0
0
---
2
6
D
6
0
0
0
0
0
0
0
1
1
---
2
5
D
5
0
0
0
0
0
0
1
1
1
---
2
4
D
4
0
0
0
0
0
1
1
1
1
---
2
3
D
3
0
0
0
0
1
1
1
1
1
---
2
2
D
2
0
0
0
1
1
1
1
1
1
---
2
1
D
1
0
0
1
1
1
1
1
1
1
LSB
2
0
D
0
0
1
1
1
1
1
1
1
1
Bit
Weight
f
c
Corner
Frequency
f
max
/256
f
max
/128
f
max
/64
f
max
/32
f
max
/16
f
max
/8
f
max
/4
f
max
/2
f
max
Tsu
21 µsecs min
DATA VALID
1
2
1784 Chessie Lane, Ottawa, IL 61350 • Tel: 800/252-7074, 815/434-7800 • FAX: 815/434-8176
e-mail: sales@freqdev.com
Web Address: http://www.freqdev.com