MB15E03SL 参数 Datasheet PDF下载

MB15E03SL

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FUNCTIONAL DESCRIPTION

1. Pulse Swallow Function

The divide ratio can be calculated using the following equation:

f

VCO

= [(M

×

N) + A]

×

f

OSC

÷

R (A < N)

f

VCO

: Output frequency of external voltage controlled oscillator (VCO)

N

: Preset divide ratio of binary 11-bit programmable counter (3 to 2,047)

A

: Preset divide ratio of binary 7-bit swallow counter (0

≤

A

≤

127)

f

OSC

: Output frequency of the reference frequency oscillator

R

: Preset divide ratio of binary 14-bit programmable reference counter (3 to 16,383)

M

: Preset divide ratio of the dual modulus prescaler (64 or 128)

2. Serial Data Input

Serial data is processed using the Data, Clock, and LE pins. Serial data controls the programmable reference divider

and the programmable divider separately.

Binary serial data is entered through the Data pin.

One bit of data is shifted into the shift register on the rising edge of the Clock. When the LE pin is taken high, stored

data is latched according to the control bit data as follows:

Table 1. Control Bit

Control Bit (CNT)

H

L

(1) Shift Register Configuration

Programmable Reference Counter

LSB

Data Flow

1

2

3

R2

4

R3

5

R4

6

R5

7

R6

8

R7

9

R8

10

11

12

13

14

15

16

17

18

19

MSB

Destination of Serial Data

For the programmable reference divider

For the programmable divider

CNT R1

R9 R10 R11 R12 R13 R14 SW

FC

LDS

CS

CNT

R1 to R14

SW

FC

LDS

CS

: Control bit

: Divide ratio setting bit for the programmable reference counter (3 to 16,383)

: Divide ratio setting bit for the prescaler (64/65 or 128/129)

: Phase control bit for the phase comparator

: LD/fout signal select bit

: Charge pump current select bit

[Table 1]

[Table 2]

[Table 5]

[Table 8]

[Table 7]

[Table 6]

Note: Start data input with MSB first.

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