MB90610A Series
s
PIN DESCRIPTION
Pin no.
LQFP*
1
80
81
83 to 90
QFP*
2
82
83
Pin name
X0
X1
Circuit
type
A
Crystal oscillator pins
(Oscillator)
K
(TTL)
In non-multiplex mode, the I/O pins for the lower 8 bits of the
external data bus.
In multiplexed mode, the I/O pins for the lower 8 bits of the
external address/data bus.
K
(TTL)
General purpose I/O ports
This applies in non-multiplexed mode with an 8-bit external
data bus.
In non-multiplexed mode, the I/O pins for the upper 8 bits of
the external data bus
This applies when using a 16-bit external data bus.
In multiplexed mode, the I/O pins for the upper 8 bits of the
external address/data bus.
B
(CMOS)
General purpose I/O ports
This applies in multiplexed mode.
In non-multiplexed mode, the output pins for the lower 8 bits
of the external address bus.
B
(CMOS)
General purpose I/O ports
This applies in multiplexed mode.
In non-multiplexed mode, the output pins for the upper 8 bits
of the external address bus.
B
(CMOS)
General purpose I/O ports
This applies when the upper address control register
specifies port operation.
The output pins for A16 to 23 of the external address bus
This applies when the upper address control register
specifies address operation.
H
General purpose I/O ports
(CMOS/H) This applies in all cases.
External interrupt request input pins
As the inputs operate continuously when external interrupts
are enabled, output to the pins from other functions must be
stopped unless done intentionally.
Function
85 to 92 D00 to D07
AD00 to AD07
91 to 98 93 to 100 P10 to P17
P08 to D15
AD08 to AD15
99
100
1 to 6
7
8
10 to 15
16 to 20
22 to 24
1 to 8
P20 to P27
A00 to A07
9
P30 to P37
10
12 to 17
A08 to A15
18 to 22 P40 to P47
24 to 26
A16 to A23
25 to 28
27 to 30 P70 to P73
INT0 to INT3
*1: FPT-100P-M05
*2: FPT-100P-M06
(Continued)
6
FUJITSU [ FUJITSU COMPONENT LIMITED. ]
