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MBM29DL64DF70PBT 参数 Datasheet PDF下载

MBM29DL64DF70PBT图片预览
型号: MBM29DL64DF70PBT
PDF下载: 下载PDF文件 查看货源
内容描述: FLASH存储器CMOS 64米(8米乘8/4米乘16 )位 [FLASH MEMORY CMOS 64 M (8 M X 8/4 M X 16) BIT]
分类和应用: 闪存存储内存集成电路
文件页数/大小: 68 页 / 793 K
品牌: FUJITSU [ FUJITSU COMPONENT LIMITED. ]
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MBM29DL64DF
-70
(Continued)
Command
Sequence
Word
HiddenROM
9,
*
10
Program
*
Byte
Bus
Write
Cycles
Req’d
Fourth Bus
First Bus Second Bus Third Bus
Fifth Bus
Sixth Bus
Read/Write
Write Cycle Write Cycle Write Cycle
Write Cycle Write Cycle
Cycle
Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data
555h
AAAh
555h
AAh
2AAh
555h
2AAh
AAh
AAAh
555h
55h
55h
555h
AAAh
(HRBA)
4
A0h
(
HRA
)
PA
PD
HiddenROM
Exit *
10
Word
4
Byte
555h
(HRBA)
90h
XXXh
00h
AAAh
*1 : Command combinations not described in “MBM29DL64DF Command Definitions” are illegal.
*2 : Both of these reset commands are equivalent.
*3 : Erase Suspend and Erase Resume command are valid only during a sector erase operations.
*4 : This command is valid during Fast Mode.
*5 : The Reset from Fast mode command is required to return to the Read mode when the device is in Fast mode.
*6 : This command is valid while RESET
=
V
ID
(except during HiddenROM mode) .
*7 : Sector Group Address (SGA) with (A
6
, A
3
, A
2
, A
1
, A
0
)
=
(0, 0, 0, 1, 0) .
*8 : The valid address are A
6
to A
0
.
*9 : The HiddenROM Entry command is required prior to the HiddenROM programming.
*10 : This command is valid during HiddenROM mode.
*11 : The data “F0h” is also acceptable.
*12 : Fourth bus cycle becomes read cycle.
Notes :
Address bits A
21
to A
11
=
X
=
“H” or “L” for all address commands except or Program Address (PA) , Sector
Address (SA) , Bank Address (BA) and Sector Group Address (SPA) .
Bus operations are defined in “MBM29DL64DF User Bus Operations (BYTE
=
V
IH
) ” and “MBM29DL64DF
User Bus Operations (BYTE
=
V
IL
) ”.
RA
=
Address of the memory location to be read
IA
=
Autoselect read address that sets both the bank address specified at (A
21
, A
20
, A
19
) and all the
other A
6
, A
3
, A
2
, A
1
, A
0
and (A-
1
) .
PA
=
Address of the memory location to be programmed
Addresses are latched on the falling edge of the write pulse.
SA
=
Address of the sector to be erased. The combination of A
21
, A
20
, A
19
, A
18
, A
17
, A
16
, A
15
, A
14
, A
13
and
A
12
will uniquely select any sector.
BA
=
Bank Address. Address setted by A
21
, A
20
, A
19
will select Bank A, Bank B, Bank C and Bank D.
RD
=
Data read from location RA during read operation.
ID
=
Device code/manufacture code for the address located by IA.
PD
=
Data to be programmed at location PA. Data is latched on the rising edge of write pulse.
SPA
=
Sector group address to be protected. Set sector group address and (A
6
, A
3
, A
2
, A
1
, A
0
)
=
(0, 0, 0, 1, 0) .
SGA
=
Sector Group Address. The combination of A
21
to A
12
will uniquely select any sector group.
SD
=
Sector group protection verify data. Output 01h at protected sector group addresses and output
00h at unprotected sector group addresses.
HRA
=
Address of the HiddenROM area
Word Mode : 000000h to 00007Fh
Byte Mode : 000000h to 0000FFh
HRBA
=
Bank Address of the HiddenROM area (A
21
=
A
20
=
A
19
=
V
IL
)
The system should generate the following address patterns :
Word Mode : 555h or 2AAh to addresses A
10
to A
0
Byte Mode : AAAh or 555h to addresses A
10
to A
0
, and A-
1
Both Read/Reset commands are functionally equivalent, resetting the device to the read mode.
11