MBM29LV160BE90PBT 参数 Datasheet PDF下载

MBM29LV160TE/BE

-70/90/12

s

FEATURES

• 0.23

µm

Process Technology

• Single 3.0 V read, program and erase

Minimizes system level power requirements

• Compatible with JEDEC-standard commands

Uses same software commands as E

2

PROMs

• Compatible with JEDEC-standard world-wide pinouts

48-pin TSOP (I) (Package suffix: TN-Normal Bend Type, TR-Reversed Bend Type)

48-pin CSOP (Package suffix: PCV)

48-ball FBGA (Package suffix: PBT)

• Minimum 100,000 program/erase cycles

• High performance

70 ns maximum access time

• Sector erase architecture

One 8K word, two 4K words, one 16K word, and thirty-one 32K words sectors in word mode

One 16K byte, two 8K bytes, one 32K byte, and thirty-one 64K bytes sectors in byte mode

Any combination of sectors can be concurrently erased. Also supports full chip erase

• Boot Code Sector Architecture

T = Top sector

B = Bottom sector

• Embedded Erase

TM

Algorithms

Automatically pre-programs and erases the chip or any sector

• Embedded Program

TM

Algorithms

Automatically programs and verifies data at specified address

• Data Polling and Toggle Bit feature for detection of program or erase cycle completion

• Ready/Busy output (RY/BY)

Hardware method for detection of program or erase cycle completion

• Automatic sleep mode

When addresses remain stable, automatically switches themselves to low power mode

• Low V

CC

write inhibit

≤

2.5 V

• Erase Suspend/Resume

Suspends the erase operation to allow a read data and/or program in another sector within the same device

• Sector protection

Hardware method disables any combination of sectors from program or erase operations

• Sector Protection Set function by Extended sector Protection command

• Fast Programming Function by Extended command

• Temporary sector unprotection

Temporary sector unprotection via the RESET pin

• In accordance with CFI (Common Flash Memory Interface)

3