GL811S USB2.0 to ATA/ATAPI Bridge Controller
LIST OF TABLES
T
ABLE
3.1 - 48 P
IN
L
IST
.................................................................................................10
T
ABLE
3.2 - 64 P
IN
L
IST
.................................................................................................10
T
ABLE
3.3
–
48 P
IN
D
ESCRIPTIONS
.................................................................................11
T
ABLE
3.4 - 64 P
IN
D
ESCRIPTIONS
.................................................................................12
T
ABLE
6.1 - M
AXIMUM
R
ATINGS
...................................................................................17
T
ABLE
6.2 - T
EMPERATURE
C
ONDITIONS
.......................................................................17
T
ABLE
6.3 - I/O T
YPE DIGITAL PINS
...............................................................................17
T
ABLE
6.4 - D+/ D-.........................................................................................................19
T
ABLE
6.5 - S
WITCHING
C
HARACTERISTICS
..................................................................19
T
ABLE
6.5 - U
LTRA
DMA
DATA BURST TIMING REQUIREMENTS
....................................27
T
ABLE
8.1 - O
RDERING
I
NFORMATION
...........................................................................38
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Genesys Logic Inc. - All rights reserved.
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