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GL827L-OGG 参数 Datasheet PDF下载

GL827L-OGG图片预览
型号: GL827L-OGG
PDF下载: 下载PDF文件 查看货源
内容描述: [Micro Peripheral IC]
分类和应用:
文件页数/大小: 21 页 / 593 K
品牌: GENESYS [ GENESYS LOGIC ]
 浏览型号GL827L-OGG的Datasheet PDF文件第1页浏览型号GL827L-OGG的Datasheet PDF文件第2页浏览型号GL827L-OGG的Datasheet PDF文件第3页浏览型号GL827L-OGG的Datasheet PDF文件第4页浏览型号GL827L-OGG的Datasheet PDF文件第6页浏览型号GL827L-OGG的Datasheet PDF文件第7页浏览型号GL827L-OGG的Datasheet PDF文件第8页浏览型号GL827L-OGG的Datasheet PDF文件第9页  
GL827L USB 2.0 Single Slot Card Reader Controller
LIST OF FIGURES
F
IGURE
3.1 – 28 P
IN
SSOP P
INOUT
D
IAGRAM
................................................................... 8
F
IGURE
3.2 – (A) 24 P
IN
QFN P
INOUT
D
IAGRAM
............................................................... 9
F
IGURE
3.3 – (B) 24 P
IN
QFN P
INOUT
D
IAGRAM
............................................................. 10
F
IGURE
4.1 - B
LOCK
D
IAGRAM
......................................................................................... 13
F
IGURE
6.1 - 5V
TO
3.3V R
EGULATOR
A
RCHITECTURE
................................................... 16
F
IGURE
6.2 - E
MBEDDED
PMOS S
WITCH
A
RCHITECTURE
.............................................. 16
F
IGURE
6.3 - T
IMING
D
IAGRAM OF
R
ESET WIDTH
........................................................... 17
F
IGURE
7.1 - GL827L 28 P
IN
SSOP P
ACKAGE
................................................................. 18
F
IGURE
7.2 - GL827L 24 P
IN
QFN P
ACKAGE
(F
OR
827L-01
AND
827L-02
VERSION ONLY
)
............................................................................................................................................ 19
F
IGURE
7.3 - GL827L 24 P
IN
QFN P
ACKAGE
(F
OR
827L-03
AND LATER VERSION
) ...... 20
LIST OF TABLES
T
ABLE
3.3 - P
IN
D
ESCRIPTIONS
......................................................................................... 11
T
ABLE
6.1 - A
BSOLUTE
M
AXIMUM
R
ATINGS
.................................................................... 15
T
ABLE
6.2 - O
PERATING
C
ONDITIONS
.............................................................................. 15
T
ABLE
6.3 - DC C
HARACTERISTICS
.................................................................................. 15
T
ABLE
6.4 – R
EGULATOR
O
UTPUT
C
URRENT
................................................................... 16
T
ABLE
6.5 - PMOS I-V
TABLE
.......................................................................................... 16
T
ABLE
8.1 - O
RDERING
I
NFORMATION
............................................................................. 21
©2000-2008 Genesys Logic Inc. - All rights reserved.
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