Mode B Read Cycle (CPU_SEL set LOW)
PARAMETER
Read Address Cycle Time
Read Cycle Time
Read Enable Setup Time
Read Address Setup Time
Read Chip Select Setup Time
Read Chip Select Hold Time
Read Data Output Delay Time
Read Data Hold Time
NUMBER
1
2
3
4
5
6
7
8
MIN
80
80
20
20
10
0
-
0
TYP
-
-
-
-
-
-
-
-
MAX
-
-
-
-
-
-
10
-
UNITS
ns
ns
GS1503
ns
ns
ns
ns
ns
ns
1
CPUADR[1:0]
01
1
00
2
11
8
CPUDAT[7:0]
Upper Address
Lower Address
7
Read
Data
CPUCS
CPUWE
5
4
3
6
5
4
3
6
3
5
6
Fig. 7 Host Interface Mode B Read Cycle Timing (CPU_SEL set LOW)
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