5. Application Information
5.1 PCB Layout
Special attention must be paid to component layout when designing serial digital
interfaces for HDTV. An FR-4 dielectric can be used, however, controlled impedance
transmission lines are required for PCB traces longer than approximately 1cm. Note the
following PCB artwork features used to optimize performance:
•
•
•
•
PCB trace width for HD rate signals is closely matched to SMT component width to
minimize reflections due to change in trace impedance.
The PCB ground plane is removed under the GS1524A input components to
minimize parasitic capacitance.
The PCB ground plane is removed under the GS1524A output components to
minimize parasitic capacitance.
High speed traces are curved to minimize impedance changes.
5.2 Typical Application Circuits
CLI
CD/MUTE
VCC
VCC
10n
10n
BNC
GS1524A
6.4n
1u
75
1u
1
2
3
4
5
6
7
8
+
1u
CLI
VCC
VEE
SDI
SDI
VEE
AGC+
AGC-
CD/MUTE
VCC
VEE
SDO
SDO
VEE
MCLADJ
BYPASS
16
15
14
13
12
11
10
9
+ 4u7
SDO
+
SDO
4u7
75
37.4
MCLADJ
BYPASS
NOTE: All resistors in Ohms,
capacitors
in Farads,
and inductors in Henrys, unless otherwise noted.
Figure 5-1:
GS1524A
Typical Application
Circuit
GS1524A Adaptive Cable Equalizer
Data Sheet
28852 - 5
June 2009
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