GS4901B/GS4900B Preliminary Data Sheet
3.5.2 Input Reference Validity
Before the device attempts to operate in Genlock mode, the input signals applied
to HSYNC and VSYNC must be valid (SD references only) and must conform to
one of the recognized and enabled video standards, as described in Section 1.4 on
page 20.
For an SD input reference signal to be considered valid, the periodicity of HSYNC
must be between 29.66us and 70us, and the periodicity of VSYNC must be
between 16ms and 25ms. The FSYNC signal is not essential for validity. The
REF_LOST pin will be set LOW once the SD input reference signal is determined
to be valid.
For HD input reference signals where the user has set the HD_Reference_Enable
bit of register 82h[7] HIGH, the device will not measure signal validity. In this case,
the REF_LOST pin will be LOW whenever any reference signal is present on the
input.
The device then compares the timing parameters of the input reference signal to
each of the video standards that has been enabled in the the
Reference_Standard_Disable register (there may be up to 36 video standards if all
HD standards are enabled). The device will then determine if the input reference is
one of the enabled and recognized standards. If it is, the VID_STD[5:0] value for
the format is written to the Input_Standard register at address 0Fh of the host
interface. If the reference format is unrecognized or disabled, 00h is programmed
in this register.
Once a reference signal is recognized by the device, VSYNC and FSYNC will no
longer be monitored. Loss of signal on these pins will not affect the operation of the
device.
If the REF_LOST pin is HIGH, or if the input signal is unrecognized as one of the
enable video formats, the GENLOCK pin should not be set LOW.
The REF_LOST output pin may also be read via bit 0 of the Genlock_Status
register (see Section 3.10.3 on page 66).
3.5.2.1 Ambiguous Standard Selection
There are some standards with identical H, V, and F timing parameters, such that
the GS4901B/GS4900B’s reference format detector cannot distinguish between
them. Table 3-2 groups standards with shared H, V, and F periods. Using the
Amb_Std_Sel register at address 10h of the host interface, the user may select
their choice of standard to be identified with a particular set of measurements. For
example, to have 1716 clocks of 27MHz per line with 525 lines per frame identified
as 4fsc 525, program Amb_Std_Sel[10:0] = XXX10XXXXXX, where ‘X’ signifies
‘don’t care’.
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