GENLINX
™
II
GS9020A
Serial Digital Video Input Processor
DATA SHEET
FEATURES
• fully compatible with SMPTE 259M
• drop-in replacement for the GS9020
• auto-standard operation to 540MHz
• embedded EDH and data processing core
• selectable loop through or re-serialized EDH-processed
serial output
• noise immune HVF timing signal outputs
• configurable FIFO reset pulse for clearing downstream
FIFOs
• ANC header and TRS-ID correction for all standards
• user controlled output blanking
• ITU-R-601 output clipping for active picture area
• ancillary data indication
• low system power
• selectable I²C interface or 8-bit parallel port for access to
EDH flags and device configuration bits
• EDH flags also available on dedicated pins
• seamless flag mapping to GS9021 EDH coprocessor
• 80 pin LQFP
• Pb-free and Green
APPLICATIONS
SMPTE 259M serial digital receiver for composite and
component standards including 4:4:4:4 at 540Mb/s with
EDH processing; Noise immune digital sync and timing
generation; Cost effective EDH insertion and checking for
serial routing and distribution applications.
ORDERING INFORMATION
PART NUMBER
GS9020ACFV
GS9020ACTV
GS9020ACFVE3
GS9020ACTVE3
PACKAGE
80 pin LQFP Tray
80 pin LQFP Tape
80 pin LQFP Tray
80 pin LQFP Tape
TEMPERATURE
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
Pb-FREE AND GREEN
No
No
Yes
Yes
DESCRIPTION
The GS9020A is specifically designed to deserialize SMPTE
259M serial digital signals. The inclusion of Error Detection
and Handling (EDH) ensures the integrity of the data being
received from the serial digital interface (SDI). Internal 75Ω
termination resistors allow INTERLINX™ seamless
connection with the GS9035A Reclocker or the GS9025A
Receiver, thus providing a complete high performance,
digital video input processor with EDH, digital sync signal
generation, and other system features.
The GS9020A also includes a parallel to serial converter
and NRZI scrambler to provide re-serialized, EDH
compliant data output. The EDH core implements EDH
insertion and extraction according to SMPTE RP-165. This
core also generates noise immune timing signals such as
horizontal sync, vertical blanking, field ID and ancillary data
identification. It also provides many system features such
as a FIFO reset pulse (which can be programmed to
coincide with either EAV or SAV), TRS-ID and ANC header
correction, user controlled output blanking and ITU-R-601
output clipping. The GS9020A has an I²C (Inter-Integrated
Circuit, I²C is a registered Trademark of Philips) serial
interface bus and an 8-bit parallel port for external access
to all error flags and device configuration bits.
GS9020A
Revision Date: June 2004
GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3
Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com
www.gennum.com
Document No. 19922 - 3
GENNUM [ GENNUM CORPORATION ]
