2. ELECTRICAL CHARACTERISTICS
2.1 ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C unless otherwise indicated
PARAMETER
Supply Voltage
Input ESD Voltage
Storage Temperature Range
Input Voltage Range (any input)
Operating Temperature Range
Power Dissipation
Lead Temperature (soldering, 10 sec)
VALUE
-0.5V to 3.6 V
DC
500V
-50°C < T
s
< 125°C
-0.3 to (V
CC
+0.3)V
0°C to 70°C
300mW
260°C
CAUTION
The GS9068 is sensitive to electrostatic discharge. Use
extreme caution, observing all ESD-prevention practices,
during handling and assembly. The SDI inputs of the GS9068
must be protected from electrostatic discharge and electrical
overstress during the handling and operation of circuit
assemblies containing the device.
GS9068
2.2 DC ELECTRICAL CHARACTERISTICS
V
CC
= 3.3V, V
EE
=0V, T
A
= 0°C to 70°C, 270Mb/s unless otherwise shown
PARAMETER
Supply Voltage
Power
Consumption
Supply Current
Output Voltage
Input Voltage
SYMBOL
V
CC
P
D
Ι
s
V
OC
V
IC
CONDITIONS
MIN
3.1
-
-
TYPICAL
3.3
160
48
V
CC
-
∆V
SDO(SE)
-
MAX
3.5
-
-
-
V
CC
-
∆V
SDI(DIFF)
/2
UNITS
V
mW
mA
mV
mV
TEST
LEVEL
3
5
1
6
1
Common mode
Common mode
-
1.6 +
∆V
SDI(DIFF)
/2
2.3 AC ELECTRICAL CHARACTERISTICS
V
CC
= 3.3V, V
EE
=0V, T
A
= 0°C to 70°C, 270Mb/s unless otherwise shown
PARAMETER
Serial input data rate
Input Voltage Swing
Output Voltage Swing
SYMBOL
DR
SDI
∆V
SDI(DIFF)
∆V
SDO(SE)
CONDITIONS
MIN
-
TYPCAL
-
-
800
MAX
540
2000
850
UNITS
Mb/s
mV
p-p
mV
p-p
TEST
LEVEL
1
1
1
Differential
Single Ended into 75Ω external
load
R
SET
= 750Ω
300
750
Additive jitter
Rise/Fall time
Mismatch in rise/fall time
Duty cycle distortion
Overshoot
Output Return Loss
TEST LEVELS
1. Production test at room temperature and nominal supply voltage with
guardbands for supply and temperature ranges.
2. Production test at room temperature and nominal supply voltage with
guardbands for supply and temperature ranges using correlated test.
3. Production test at room temperature and nominal supply voltage.
4. QA sample test.
5. Calculated result based on Level 1, 2, or 3.
6. Not tested. Guaranteed by design simulations.
7. Not tested. Based on characterization of nominal parts.
8. Not tested. Based on existing design/characterization data of similar
product.
9. Indirect test.
10. Wafer Probe
ORL
t
r
, t
f
∆t
r
,
∆t
f
20% - 80%
-
400
-
-
-
15
-
-
-
-
-
-
30
800
30
100
8
-
ps
ps
ps
ps
%
dB
1
1
1
1
1
7
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22213 - 2
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