GS9060 Data Sheet
Table 1-1: Pin Descriptions (Continued)
Pin
Number
21
Name
SDO_EN/DIS
Timing
Non
Synchronous
Type
Input
Description
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to enable or disable the serial digital output loop-through
stage.
When set LOW, the serial digital output signals SDO and SDO
are disabled and become high impedance.
When set HIGH, the serial digital output signals SDO and SDO
are enabled.
22
23, 24
CD_GND
SDO, SDO
–
Analog
Power
Output
Ground connection for the serial digital cable driver. Connect to
analog GND.
Serial digital loop-through output signal operating at 270Mb/s.
The slew rate of these outputs is automatically controlled to meet
SMPTE 259M specifications.
25
RESET_TRST
Non
Synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to reset the internal operating conditions to default settings
and to reset the JTAG test sequence.
Host Mode (JTAG/HOST = LOW)
When asserted LOW, all functional blocks will be set to default
conditions and all input and output signals become high
impedance, including the serial digital outputs SDO and SDO.
Must be set HIGH for normal device operation.
JTAG Test Mode (JTAG/HOST = HIGH)
When asserted LOW, all functional blocks will be set to default
and the JTAG test sequence will be held in reset.
When set HIGH, normal operation of the JTAG test sequence
resumes.
26
JTAG/HOST
Non
Synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to select JTAG Test Mode or Host Interface Mode.
When set HIGH, CS_TMS, SDOUT_TDO, SDI_TDI and
SCLK_TCK are configured for JTAG boundary scan testing.
When set LOW, CS_TMS, SDOUT_TDO, SDI_TDI and
SCLK_TCK are configured as GSPI pins for normal host
interface operation.
27
CS_TMS
Synchronous
with
SCLK_TCK
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Chip Select / Test Mode Select
Host Mode (JTAG/HOST = LOW)
CS_TMS operates as the host interface chip select, CS, and is
active LOW.
JTAG Test Mode (JTAG/HOST = HIGH)
CS_TMS operates as the JTAG test mode select, TMS, and is
active HIGH.
NOTE: If the host interface is not being used, tie this pin HIGH.
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January 2007
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