GS9091B GenLINX® II 270Mb/s Deserializer for SDI and DVB-ASI
Key Features
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SMPTE 259M-C compliant descrambling and NRZI to
NRZ decoding (with bypass)
DVB-ASI 8b/10b decoding
Integrated Cable Equalizer
500m typical equalization of Belden 1694A cable
Integrated line-based FIFO for data alignment/delay,
clock phase interchange, DVB-ASI data packet
extraction and clock rate interchange, and ancillary
data packet extraction
Integrated VCO and reclocker
User selectable additional processing features
including:
TRS, ANC data checksum, and EDH CRC error
detection and correction
programmable ANC data detection
illegal code remapping
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Internal flywheel for noise immune H, V, F extraction
Automatic standards detection and indication
Enhanced Gennum Serial Peripheral Interface (GSPI)
JTAG test interface
Polarity insensitive for DVB-ASI and SMPTE signals
+1.8V core power supply with optional +1.8V or +3.3V
I/O power supply
Small footprint (11mm x 11mm)
Low power operation (typically 350mW)
Pb-free and RoHS compliant
Description
The GS9091B is a 270Mb/s equalizing and reclocking dese-
rializer with an internal FIFO. It provides a complete re-
ceive solution for SD-SDI and DVB-ASI applications.
In addition to equalizing, reclocking and deserializing the
input data stream, the GS9091B performs NRZI -to-NRZ de-
coding, descrambling as per SMPTE 259M-C, and word
alignment when operating in SMPTE mode. When operat-
ing in DVB-ASI mode, the device will word align the data to
K28.5 sync characters and 8b/10b decode the received
stream.
The integrated equalizer is optimized for 270Mb/s and can
typically equalize up to 500m of Belden 1694A cable. Both
the equalizer and the internal reclocker are fully compati-
ble with both SMPTE and DVB-ASI input streams.
The GS9091B includes a range of data processing functions
such as EDH support (error detection and handling), and
automatic standards detection. The device can also detect
and extract SMPTE 352M payload identifier packets and in-
dependently identify the received video standard. This in-
formation is read from internal registers via the host
interface port.
The GS9091B also incorporates a video line-based FIFO.
This FIFO may be used in four user-selectable modes to car-
ry out tasks such as data alignment / delay, clock phase in-
terchange, MPEG packet extraction and clock rate
interchange, and ancillary data packet extraction.
Parallel data outputs are provided in 10-bit multiplexed
format, with the associated parallel clock output signal op-
erating at 27MHz.
The device may also be used in a low-latency data pass
through mode where only descrambling and word align-
ment will be performed in SMPTE mode.
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Applications
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SMPTE 259M-C Serial Digital Interfaces
DVB-ASI Serial Digital Interfaces
GS9091B GenLINX® II 270Mb/s Deserializer for SDI and DVB-ASI
Data Sheet
38910 - 2
July 2008
1 of 71
Proprietary & Confidential
GENNUM [ GENNUM CORPORATION ]
