Global Mixed-mode Technology Inc.
Pin Description
G923
NAME
PIN
FUNCTION
Active-Low Shutdown Input. A logic low reduces the supply current to less than 1µA. Connect to IN for normal opera-
tion.
SHDN
1
Ground. This pin also functions as a heatsink. Solder to large pads or the circuit board ground plane to maxi-
mize thermal dissipation.
2
3
4
GND
IN
Regulator Input. Supply voltage can range from +2.5V to +5.5V. Bypass with 1µF to GND
Regulator Output. Fixed or adjustable from 1.25V to +5.5V. Sources up to 300mA. Bypass with a 4.7µF, ＜
OUT
0.2Ω typical ESR capacitor to GND.
Feedback Input for Setting the Output Voltage. Connect to GND to set the output voltage to the preset output
voltage. Connect to an external resistor divider for adjustable-output operation.
5
SET
voltage up to 1.25V. Thus, through this feedback ac-
Detailed Description
tion, the error amplifier, output PMOS, and the voltage
dividers effectively form a unity-gain amplifier with the
feedback voltage force to be the same as the 1.25V
bandgap reference. The output voltage, VOUT, is then
given by the following equation:
The block diagram of the G923 is shown in Figure 1. It
consists of an error amplifier, 1.25V bandgap reference,
PMOS output transistor, internal feedback voltage divider,
mode comparator, shutdown logic, over current protec-
tion circuit, and over temperature protection circuit.
VOUT = 1.25 (1 + R1/R2).
(1)
The mode comparator compares the SET pin voltage
with an internal 350mV reference. If the SET pin volt-
age is less than 350mV, the internal feedback voltage
divider’s central tap is connected to the non-inverting
input of the error amplifier. The error amplifier com-
pares non-inverting input with the 1.25V bandgap ref-
erence. If the feedback voltage is higher than 1.25V,
the error amplifier’s output becomes higher so that the
PMOS output transistor has a smaller gate-to-source
voltage (VGS). This reduces the current carrying capa-
bility of the PMOS output transistor, as a result the
output voltage decreases until the feedback voltage is
equal to 1.25V. Similarly, when the feedback voltage is
less than 1.25V, the error amplifier causes the output
PMOS to source more current to pull the feedback
Alternatively, the relationship between R1 and R2 is
given by:
R1 = R2 (VOUT /1.25 - 1).
(2)
For the reasons of reducing power dissipation and
loop stability, R2 is chosen to be 100KΩ. For G923-
330, R1 is 164K, and the pre-set VOUT is 3.30V.
When external voltage divider is used, as shown in
Figure 2, the SET pin voltage will be larger than
350mV. The non-inverting input of the amplifier will be
connected to the external voltage divider. However,
the operation of the feedback loop is the same, so that
the conditions of Equations 1 and 2 are still true. The
output voltage is still given by Equation 1.
IN
SHDN
－
OVER CURRENT
PROTECT & DYNAMIC
FEEDBACK
P
ERROR
AMP
SHUTDOWN
LOGIC
＋
OUT
SET
－
R1
OVER TEMP.
PROTECT
1.25V
Vref
＋
＋
－
350mV
R2
MODE COMPARATOR
GND
Figure 1. Functional Diagram
TEL: 886-3-5788833
http://www.gmt.com.tw
Ver: 1.5
Jan 16, 2007
6
GMT [ GLOBAL MIXED-MODE TECHNOLOGY INC ]
