GS73024AB
ns
3.3 V V
DD
V
DD
and V
SS
Commercial Temp
Industrial Temp
Features
Asynchronous SRAM
119-Bump Ball Grid Array Package
• Fast access time: 8, 10, 12 ns
• CMOS low power operation: 250/200/170 mA at minimum
cycle time
• Single 3.3 V ± 0.3V power supply
• All inputs and outputs are TTL-compatible
• Fully static operation
• Industrial Temperature Option: –40 to 85°C
• Package
B: 14 mm x 22 mm, 119-bump, 1.27mm pitch BGA
Description
The GS73024A is a high speed CMOS Static RAM organized
as 131,072 words by 24 bits. Static design eliminates the need
for external clocks or timing strobes. Operating on a single
3.3 V power supply, and all inputs and outputs are
TTL-compatible. The GS73024A is available in a 119-bump
BGA package.
Block Diagram
A
0
Address
Input
A
16
CE
Row
Decoder
Memory Array
Column
Decoder
Control
WE
OE
I/O Buffer
DQ
1
DQ
24
Pin Descriptions
Symbol
A
0
to A
16
WE
CE
V
DD
Description
Address input
Write enable input
Chip enable input
+3.3 V power supply
Symbol
DQ
1
to DQ
24
OE
V
SS
Description
Data input/output
Output enable input
Ground
Rev: 1.03 12/2005
1/12
© 2003, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.