GS840E18AGT-166 参数 Datasheet PDF下载

GS840E18/32/36AT/B-190/180/166/150/100

BGA Pin Description

Symbol

A

0

, A

1

A

DQ

A

DQ

B

DQ

C

DQ

D

B

A

, B

B

, B

C

, B

D

CK

BW

GW

E

1

, E

3

E

2

G

ADV

ADSP, ADSC

ZZ

FT

LBO

V

DD

V

SS

V

DDQ

NC

Type

I

I

I/O

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

—

Description

Address field LSBs and Address Counter Preset Inputs

Address Inputs

Data Input and Output pins

Byte Write Enable for DQ

A

, DQ

B

, DQ

C

, DQ

D

I/Os; active low

Clock Input Signal; active high

Byte Write—Writes all enabled bytes; active low

Global Write Enable—Writes all bytes; active low

Chip Enable; active low

Chip Enable; active high

Output Enable; active low

Burst address counter advance enable; active low

Address Strobe (Processor, Cache Controller); active low

Sleep Mode control; active high

Flow Through or Pipeline mode; active low

Linear Burst Order mode; active low

Core power supply

I/O and Core Ground

Output driver power supply

No Connect

Rev: 1.12 10/2004

9/31

© 1999, GSI Technology

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.