Preliminary.
GS881Z18/36T-11/100/80/66
100-Pin TQFP Pin Descriptions
Pin Location
Symbol Type
Description
37, 36
A0, A1
In
Burst Address Inputs—Preload the burst counter
35, 34, 33, 32, 100, 99, 83, 82,
81, 50, 49, 48, 47, 46, 45, 44
A2–A17
In
Address Inputs
80
89
93
94
95
96
88
98
97
92
86
85
87
A18
CK
BA
In
In
Address Input (x18 Version Only)
Clock Input Signal
In
Byte Write signal for data inputs DQA1–DQA9; active low
Byte Write signal for data inputs DQB1–DQB9; active low
Byte Write signal for data inputs DQC1–DQC9; active low (x36 Version Only)
Byte Write signal for data inputs DQD1–DQD9; active low (x36 Version Only)
Write Enable; active low
BB
In
BC
In
BD
In
W
In
E1
In
Chip Enable; active low
E2
In
Chip Enable; active high; for self decoded depth expansion
Chip Enable; active low; for self decoded depth expansion
Output Enable; active low
E3
In
G
In
ADV
CKE
In
Advance/Load—Burst address counter control pin
Clock Input Buffer Enable; active low
In
58, 59, 62,63, 68, 69, 72, 73, 74 DQA1–DQA9
I/O
I/O
Byte A Data Input and Output pins (x18 Version Only)
Byte B Data Input and Output pins (x18 Version Only)
8, 9, 12, 13, 18, 19, 22, 23, 24
DQB1–DQB9
51, 52, 53, 56, 57, 75, 78, 79,
1, 2, 3, 6, 7, 25, 28, 29, 30
NC
—
No Connect (x18 Version Only)
51, 52, 53, 56, 57, 58, 59, 62,63 DQA1–DQA9
I/O
Byte A Data Input and Output pins (x36 Versions Only)
Byte B Data Input and Output pins (x36 Versions Only)
Byte C Data Input and Output pins (x36 Versions Only)
Byte D Data Input and Output pins (x36 Versions Only)
Power down control; active high
68, 69, 72, 73, 74, 75, 78, 79, 80 DQB1–DQB9 I/O
1, 2, 3, 6, 7, 8, 9, 12, 13
DQC1–DQC9
I/O
I/O
In
18, 19, 22, 23, 24, 25, 28, 29, 30 DQD1–DQD9
64
14
31
ZZ
FT
In
Pipeline/Flow Through Mode Control; active low
Linear Burst Order; active low
LBO
In
Rev: 1.10 8/2000
4/34
© 1998, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com
GSI [ GSI TECHNOLOGY ]
