NMOS linear image sensor
s
Shape specifications
Parameter
S3901-128Q S3901-256Q
Number of pixels
128
256
Package length
31.75
Number of pins
22
3
Window material *
Quartz
Weight
3.0
*3: Fiber optic plate is available.
S3901-512Q
512
40.6
3.5
S3901/S3904 series
Unit
-
mm
-
-
g
S3904-256Q S3904-512Q S3904-1024Q
256
512
1024
31.75
40.6
22
Quartz
3.0
3.5
s
Specifications (Ta=25 °C)
Parameter
Symbol
Pixel pitch
-
Pixel height
-
Spectral response range
200 to 1000
λ
(10 % of peak)
Peak sensitivity wavelength
-
600
λp
4
Photodiode dark current *
I
D
-
0.2
4
Photodiode capacitance *
Cph
-
20
4, 5
Saturation exposure * *
Esat
-
180
Saturation output charge *
4
Qsat
-
50
6
Photo response non-uniformity *
PRNU
-
-
*4: Vb=2.0 V, Vφ=5.0 V
*5: 2856 K, tungsten lamp
*6: 50 % of saturation, excluding the start pixel and last pixel
S3901 series
Min.
Typ.
Max.
-
50
-
-
2.5
-
-
0.6
-
-
-
±3
S3904 series
Min.
Typ.
Max.
-
25
-
-
2.5
-
200 to 1000
-
-
-
-
-
-
600
0.1
10
180
25
-
-
0.3
-
-
-
±3
Unit
µm
mm
nm
nm
pA
pF
mlx · s
pC
%
s
Electrical characteristics (Ta=25 °C)
Parameter
Clock pulse (φ1,
φ2)
voltage
Symbol
Condition
High Vφ1, Vφ2 (H)
Low Vφ1, Vφ2 (L)
High
Vφs (H)
Start pulse (φst) voltage
Low
Vφs (L)
7
Video bias voltage *
Vb
Saturation control gate voltage
Vscg
Saturation control drain voltage
Vscd
trφ1, trφ2
Clock pulse (φ1,
φ2)
rise / fall time *
8
tfφ1, tfφ2
Clock pulse (φ1,
φ2)
pulse width
tpwφ1, tpwφ2
Start pulse (φst) rise / fall time
trφs, tfφs
Start pulse (φst) pulse width
tpwφs
Start pulse (φst) and clock pulse
tφov
(φ2) overlap
Clock pulse space
*
8
X
1
, X
2
9
Data rate *
f
Video delay time
Clock pulse (φ1,
φ2)
line capacitance
Saturation control gate (Vscg)
line capacitance
Video line capacitance
tvd
Cφ
Cscg
C
V
S3901 series
Min.
Typ.
Max.
4.5
5
10
0
-
0.4
4.5
10
Vφ1
0
-
0.4
1.5
Vφ - 3.0 Vφ - 2.5
-
0
-
-
Vb
-
-
200
-
200
200
trf - 20
0.1
-
-
-
-
-
-
-
-
-
-
-
-
20
-
20
-
-
-
-
-
-
-
S3904 series
Min.
Typ.
Max.
4.5
5
10
0
-
0.4
4.5
10
Vφ1
0
-
0.4
1.5
Vφ - 3.0 Vφ - 2.5
-
0
-
-
Vb
-
-
200
-
200
200
trf - 20
0.1
-
-
-
-
-
-
-
-
-
-
-
-
20
-
20
-
-
-
-
100 (-256 Q)
150 (-512 Q)
200 (-1024 Q)
27 (-256 Q)
50 (-512 Q)
100 (-1024 Q)
14 (-256 Q)
24 (-512 Q)
45 (-1024 Q)
10 (-256 Q)
16 (-512 Q)
30 (-1024 Q)
-
-
-
-
-
-
2000
-
-
-
-
-
-
-
-
-
-
-
-
Unit
V
V
V
V
V
V
V
ns
ns
ns
ns
ns
ns
kHz
ns
ns
ns
pF
pF
pF
pF
pF
pF
pF
pF
pF
50 % of
saturation
*
9,
*
10
5 V bias
5 V bias
2 V bias
-
-
-
2000
-
80 (-128 Q)
-
120 (-256 Q)
-
160 (-512 Q)
-
21 (-128 Q)
-
36 (-256 Q)
-
67 (-512 Q)
-
12 (-128 Q)
-
20 (-256 Q)
-
35 (-512 Q)
-
7 (-128 Q)
-
11 (-256 Q)
-
20 (-512 Q)
*7: Vφ is input pulse voltage (refer to figure 8).
*8: trf is the clock pulse rise or fall time. A clock pulse space of rise time/fall time - 20 ns (nanoseconds) or more should be
input if the clock pulse rise or fall time is longer than 20 ns (refer to figure 7).
*9: Vb=2.0 V, Vφ=5.0 V
*10: Measured with C7883 driver circuit.
HAMAMATSU [ HAMAMATSU CORPORATION ]
