HANBit
FUNCTIONAL DESCRIPTION
HMNR5128D(V)
The HMNR5128D(V) is a full function, year 2000 compliant (Y2KC), real– time clock/calendar (RTC) and 512k x 8 non-
volatile static RAM. User access to all registers within the HMNR5128D(V) is accomplished with a bytewide interface . The
Real-time clock (RTC) information and control bits reside in the eight upper most RAM locations. The RTC registers
contain century, year, month, date, day, hours, minutes, and seconds data in 24-hour BCD format. Corrections for the date
of each month and leap year are made automatically. The RTC clock registers are double buffered to avoid access of
incorrect data that can occur during clock update cycles. The double buffered system also prevents time loss as the
timekeeping countdown continues unabated by access to time register data. The HMNR5128D(V) also contains its own
power-fail circuitry which deselects the device when the V
CC
supply is in an out of tolerance condition. This feature
prevents loss of data from unpredictable system operation brought on by low V
CC
as errant access and update cycles are
avoided.
BLOCK DIAGRAM
OSCILLATOR AND
CLOCK CHAIN
32.768KHz
CRYSTAL
16 x 8
TIMEKEEPER
REGISTER
A0 ~ A18
POWER
524,272 x 8
SRAM ARRAY
V
PFD
VOLTAGE SENSE
AND
SWITCHING
CIRCURITY
LITHIUM
CELL
DQ0 ~ DQ7
/CE
/WE
/OE
Vcc
A0-A18 : Address Input
/CE : Chip Enable
V
ss
: Ground
DQ0-DQ7 : Data In / Data Out
/WE : Write Enable
/OE : Output Enable
V
CC
: Power (+5V or +3.3V)
NC : No Connection
Vss
URL : www.hbe.co.kr
Rev. 2.0 (March, 2002)
2
HANBit Electronics Co.,Ltd
HANBIT [ HANBIT ELECTRONICS CO.,LTD ]
