HANBit
HMNR88D(V)
READ Mode AC Waveforms
/CE
/OE
Note : /WE = High.
READ Mode AC Characteristics
HMNR88D
-70
HMNR88D(V)V
-85
Symbol
Parameter
Unit
Min
Max
Min
85
Max
tAVAV
tAVQV
tELQV
tGLQV
READ Cycle Time
70
nS
nS
nS
nS
nS
nS
nS
nS
nS
Address Valid to Output Valid
70
70
25
85
85
35
Chip Enable Low to Output Valid
Output Enable Low to Output Valid
Chip Enable Low to Output Transition
Output Enable Low to Output Transition
Chip Enable High to Output Hi-Z
Output Enable High to Output Hi-Z
Address Transition to Output Transition
(2)
tELQX
5
0
5
0
(2)
tGLQX
(2)
tEHQZ
20
20
25
25
(2)
tGHQZ
tAXQX
5
5
Note: 1.Valid for Ambient Operating Temperature: TA = 0 to 70°C; VCC = 4.5 to 5.5V or 3.0 to 3.6V (except where noted).
2. CL = 5pF.
WRITE Mode
The HMNR88D(V) is in the WRITE Mode whenever /WE (WRITE Enable) and /CE (Chip Enable) are low state after the
address inputs are stable. The start of a WRITE is referenced from the latter occurring falling edge of /WE or /CE. A
WRITE is terminated by the earlier rising edge of /WE or /CE. The addresses must be held valid throughout the cycle. /CE
or /WE must return high for a minimum of tEHAX from Chip Enable or tWHAX from WRITE Enable prior to the initiation of
another READ or WRITE cycle. Data-in must be valid tDVWH prior to the end of WRITE and remain valid for tWHDX
afterward. /OE should be kept high during WRITE cycles to avoid bus contention; although, if the output bus has been
activated by a low on /CE and /OE a low on /WE will disable the outputs tWLQZ after /WE falls.
URL : www.hbe.co.kr
Rev. 1.0 (April, 2002)
6
HANBit Electronics Co.,Ltd.
HANBIT [ HANBIT ELECTRONICS CO.,LTD ]
