HANBit
Notes
(Read Cycle)
HMS1M32M8A/Z8A
1. /WE is high for read cycle.
2. All read cycle timing is referenced from the last valid address to first transition address.
3. t
HZ
and t
OHZ
are defined as the time at which the outputs achieve the open circuit condition and are not referenced to V
OH
or V
OL
levels.
4. At any given temperature and voltage condition, t
HZ
(max.) is less than t
LZ
(min.) both for a given device and from device
to device.
5. Transition is measured
±
200mV from steady state voltage with Load (B). This parameter is sampled and not 100%
tested.
6. Device is continuously selected with /CE = V
IL
.
7. Address valid prior to coincident with /CE transition low.
TIMING WAVEFORM OF WRITE CYCLE
(/OE = Clock )
t
WC
Address
t
AW
t
WR(5)
/OE
t
CW(3)
/CE
t
AS(4)
t
WP(2)
/WE
t
DW
t
DH
Data Valid
t
OHZ
t
OW
High-Z
High-Z
Data In
Data Out
TIMING WAVEFORM OF WRITE CYCLE
(/OE Low Fixed)
t
WC
Address
t
AW
t
CW(3)
t
WR(5)
/CE
t
AS(4)
t
OH
t
WP(2)
t
DW
t
DH
Data Valid
t
WHZ(6,7)
t
OW
High-Z(8)
(10)
(9)
/WE
Data In
High-Z
Data Out
6
HANBit Electronics Co.,Ltd.
HANBIT [ HANBIT ELECTRONICS CO.,LTD ]
