HANBit
HAN
BI T
SRAM MODULE 768KBit (32K x 24-Bit)
Part No.
HMS3224M3/Z3
HMS3224M3, HMS3224Z3
GENERAL DESCRIPTION
The HMS3224M3/Z3 is a high-speed static random access memory (SRAM) module containing 32,768 words
organized in a x24-bit configuration. The module consists of three 32K x 8 SRAMs mounted on a 56-pin, single-
sided, FR4-printed circuit board.
Writing to the device is accomplished when the chip enable (/CE) and write enable(/WE) inputs are both LOW.
Data on the input/output pins (DQ0 through DQ23) of the device is written into the memory location specified
on the address pins (A0 through A14).
Reading the device is accomplished by taking the chip enable (/CE) and output enable(/OE) LOW while write
enable(/WE) remains HIGH. Under these conditions, the contents of the memory location specified on the address
pins will appear on the input/output pins.
The input/output pins remains in a high-impedance state unless the module is selected, outputs are enabled, and
write enable is HIGH.
PIN ASSIGNMENT
FEATURES
Access times : 12, 15 and 20ns
High-density 768Kbit design
High-reliability, high-speed design
Single + 5V
±0.5V
power supply
56-pin, low-active power design
All inputs and outputs are TTL-compatible
Industry-standard pinout
FR4-PCB design
Part identification
HMS3224M3 : 56Pin SIMM Design
HMS3224Z3 : 56Pin ZIP Design
→Pin-compatible
with the HMS3224M3
Vcc
DQ1
DQ3
DQ5
DQ7
Vss
A1
A3
A5
A7
NC
Vss
DQ9
DQ11
DQ13
DQ15
NC
/OE
A9
A11
A13
NC
Vss
DQ17
DQ19
DQ21
DQ23
Vcc
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
Vcc
DQ0
DQ2
DQ4
DQ6
Vss
A0
A2
A4
A6
/CE
NC
DQ8
DQ10
DQ12
DQ14
Vss
/WE
A8
A10
A12
A14
Vss
DQ16
DQ18
DQ20
DQ22
Vcc
OPTIONS
Timing
12ns access
15ns access
20ns access
MARKING
-12
-15
-20
M
Z
Packages
56-pin SIMM
56-pin ZIP
ZIP
TOP VIEW
1
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