HANBit
HMS51232J4A
SRAM MODULE 2Mbyte (512K x 32-Bit), 68-Pin JLCC Packaging
Part No. HMS51232J4A
GENERAL DESCRIPTION
The HMS51232J4A is a static random access memory (SRAM) module containing 524,288 words organized in a x32-bit
configuration. The module consists of four 512K x 8 SRAMs mounted on a 68-pin, single-sided, FR4-printed circuit board.
Four chip enable inputs, (/CE1, /CE2, /CE3 and /CE4) are used to enable the module’s 4 bytes independently. Output
enable(/OE) and write enable(/WE) can set the memory input and output.
Data is written into the SRAM memory when write enable (/WE) and chip enable (/CE) inputs are both LOW.
accomplished when /WE remains HIGH and /CE and output enable (/OE) are LOW.
For reliability, this SRAM module is designed as multiple power and ground pin. All module components may be powered from
a single +5V DC power supply and all inputs and outputs are fully TTL-compatible.
Reading is
FEATURES
w
Access time : 10, 12 and 15ns
w
High-density 2MByte design
w
High-reliability, low-power design
w
Single +5V
±0.5V
power supply
w
Three state output and TTL-compatible
w
FR4-PCB design
w
Low profile 68-Pin JLCC
PIN ASSIGNMENT
DQ16
A18
A17
/CE4
/CE3
/CE2
/CE1
NC
Vcc
NC
NC
/OE
/WE
A16
A15
A14
DQ15
DQ17
DQ18
DQ19
Vss
DQ20
DQ21
DQ22
DQ23
Vcc
DQ24
DQ25
DQ26
DQ27
Vss
DQ28
DQ29
DQ30
10 9 8
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
26
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
OPTIONS
w
Timing
10ns access
12ns access
15ns access
w
Packages
68-pin JLCC
MARKING
-10
-12
-15
J
DQ14
DQ13
DQ12
Vss
DQ11
DQ10
DQ9
DQ8
Vcc
DQ7
DQ6
DQ5
DQ4
Vss
DQ3
DQ2
DQ1
URL: www.hbe.co.kr
Rev. 1.0 (May / 2003)
1
DQ31
A6
A5
A4
A3
A2
A1
A0
Vcc
A13
A12
A11
A10
A9
A8
A7
DQ0
68-Pin JLCC
TOP VIEW
HANBit Electronics Co.,Ltd.