HANBit
OPERATING AC PARAMETER
(AC operating conditions unless otherwise noted)
VERSION
PARAMETER
Row active to row active delay
RAS to CAS delay
Row precharge time
Row active time
SYMBOL
-75
t
RRD
(min)
t
RP
(min)
t
RP
(min)
t
RAS
(min)
t
RAS
(max)
tRC
(min)
HSD32M64D8H
UNIT
-80
16
20
20
48
100
65
68
2
2 CLK + 20 ns
1
1
1
2
ea
70
70
-10
20
20
20
50
-10L
20
20
20
50
ns
ns
ns
ns
ns
ns
CLK
-
CLK
CLK
CLK
15
20
20
45
NOTE
1
1
1
1
Row cycle time
Last data in to row precharge
Last data in to Active delay
Last data in to new col. address delay
Last data in to burst stop
Col. address to col. address delay
Number of valid output data
1
2
t
RDL
(min)
t
DAL
(min)
t
CDL
(min)
t
BDL
(min)
t
CCD
(min)
CAS latency=3
CAS latency=2
-
2
2
3
4
1
Notes :
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and
then rounding off to the next higher integer.
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
.5. For -8/H/L/10, tRDL=1CLK and tDAL=1CLK+20ns is also supported .
( recommend : tRDL=2CLK and tDAL=2CLK + 20ns.)
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
-75
PARAMETER
CLK cycle time
CAS
7.5
latency=3
t
CC
CAS
-
latency=2
CLK to valid
output delay
CAS
5.4
latency=3
t
SAC
CAS
-
latency=2
Output data
hold time
CAS
latency=3
t
OH
2.7
3
3
3
ns
2
-
6
7
ns
1,2
6
6
6
-
10
12
1000
1000
1000
1000
ns
1
8
10
10
SYMBOL
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
-80
-10
-10L
UNIT
NOTE
URL:www.hbe.co.kr
REV.1.0 (August.2002)
-7-
HANBit Electronics Co.,Ltd.
HANBIT [ HANBIT ELECTRONICS CO.,LTD ]
