Semiconductor
CD4070B,
CD4077B
CMOS Quad Exclusive-OR
and Exclusive-NOR Gate
Description
The Harris CD4070B contains four independent Exclusive-
OR gates. The Harris CD4077B contains four independent
Exclusive-NOR gates.
The CD4070B and CD4077B provide the system designer
with a means for direct implementation of the Exclusive-OR
and Exclusive-NOR functions, respectively.
June 1998
Features
• High-Voltage Types (20V Rating)
• CD4070B - Quad Exclusive-OR Gate
• CD4077B - Quad Exclusive-NOR Gate
• Medium Speed Operation
- t
PHL
, t
PLH
= 65ns (Typ) at V
DD
= 10V, C
L
= 50pF
• 100% Tested for Quiescent Current at 20V
• Standardized Symmetrical Output Characteristics
• 5V, 10V and 15V Parametric Ratings
• Maximum Input Current of 1µA at 18V Over Full
Package Temperature Range
- 100nA at 18V and 25
o
C
• Noise Margin (Over Full Package Temperature Range)
- 1V at V
DD
= 5V, 2V at V
DD
= 10V, 2.5V at V
DD
= 15V
• Meets All Requirements of JEDEC Standard No. 13B,
“Standard Specifications for Description of ‘B’ Series
CMOS Devices
Ordering Information
PART NUMBER
CD4070BE
CD4077BE
CD4070BF
CD4077BF
CD4070BM
CD4077BM
TEMP.
RANGE (
o
C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
14 Ld PDIP
14 Ld PDIP
14 Ld CERDIP
14 Ld CERDIP
14 Ld SOIC
14 Ld SOIC
PKG.
NO.
E14.3
E14.3
F14.3
F14.3
M14.15
M14.15
Applications
• Logical Comparators
• Adders/Subtractors
• Parity Generators and Checkers
Pinouts
CD4070B
(PDIP, CERDIP, SOIC)
TOP VIEW
CD4077B
(PDIP, CERDIP, SOIC)
TOP VIEW
A 1
B 2
J=A
⊕
B 3
K=C
⊕
D 4
C 5
D 6
V
SS
7
14 V
DD
13 H
12 G
11 M = G
⊕
H
10 L = E
⊕
F
9 F
8 E
A 1
B 2
J=A
⊕
B 3
K=C
⊕
D 4
C 5
D 6
V
SS
7
14 V
DD
13 H
12 G
11 M = G
⊕
H
10 L = E
⊕
F
9 F
8 E
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
©
Harris Corporation 1998
File Number
910.1
1
HARRIS [ HARRIS CORPORATION ]
