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CD74HC139E 参数 Datasheet PDF下载

CD74HC139E图片预览
型号: CD74HC139E
PDF下载: 下载PDF文件 查看货源
内容描述: 高速CMOS逻辑双路2至4线译码器/多路解复用器 [High Speed CMOS Logic Dual 2-to-4 Line Decoder/Demultiplexer]
分类和应用: 解复用器
文件页数/大小: 5 页 / 30 K
品牌: HARRIS [ HARRIS CORPORATION ]
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CD74HC139, CD74HCT139
Switching Specifications
Input t
r
, t
f
= 6ns
(Continued)
25
o
C
MIN
-
-
-
-
-
TYP
-
-
-
55
-
MAX
75
15
13
-
10
-40
o
C TO
85
o
C
MIN
-
-
-
-
-
MAX
95
19
16
-
10
-55
o
C TO
125
o
C
MIN
-
-
-
-
-
MAX
110
22
19
-
10
UNITS
ns
ns
ns
pF
pF
PARAMETER
SYMBOL
TEST
CONDITIONS
C
L
= 50pF
V
CC
(V)
2
4.5
6
Output Transition Time (Figure 1) t
TLH
, t
THL
Power Dissipation
Capacitance, (Notes 5, 6)
Input Capacitance
HCT TYPES
Propagation Delay
A0, A1 to Outputs
E to Outputs
Select to Output
Enable to Output
Output Transition Time
(Figure 2)
Power Dissipation
Capacitance, (Notes 5, 6)
Input Capacitance
NOTES:
C
PD
C
IN
-
-
5
-
t
PLH
,
t
PHL
t
PLH
,
t
PHL
t
PLH,
t
PHL
t
PLH,
t
PHL
t
TLH
, t
THL
C
PD
C
IN
C
L
= 50pF
C
L
= 50pF
C
L
= 15pF
C
L
= 15pF
C
L
= 50pF
-
-
4.5
4.5
5
5
4.5
5
-
-
-
-
-
-
-
-
-
-
14
14
-
59
-
34
34
-
-
15
-
10
-
-
-
-
-
-
-
43
43
-
-
19
-
10
-
-
-
-
-
-
-
51
51
-
-
22
-
10
ns
ns
ns
ns
ns
pF
pF
5. C
PD
is used to determine the dynamic power consumption, per decoder/demux.
6. P
D
= V
CC2
f
i
(C
PD
+ C
L
) where: f
i
= Input Frequency, C
L
= Output Load Capacitance, V
CC
= Supply Voltage.
Test Circuits and Waveforms
t
r
= 6ns
INPUT
90%
50%
10%
t
TLH
90%
50%
10%
t
PHL
t
PLH
t
f
= 6ns
V
CC
INPUT
GND
t
THL
t
r
= 6ns
2.7V
1.3V
0.3V
t
TLH
90%
INVERTING
OUTPUT
t
PHL
t
PLH
1.3V
10%
t
f
= 6ns
3V
GND
t
THL
INVERTING
OUTPUT
FIGURE 1. HC AND HCU TRANSITION TIMES AND PROPAGA-
TION DELAY TIMES, COMBINATION LOGIC
FIGURE 2. HCT TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
5