CD74HC373, CD74HCT373, CD54HC573, CD74HC573, CD74HCT573
Test Circuits and Waveforms
6ns
OUTPUT
DISABLE
90%
50%
10%
t
PZL
50%
10%
t
PHZ
OUTPUT HIGH
TO OFF
OUTPUTS
ENABLED
90%
50%
OUTPUTS
DISABLED
OUTPUTS
ENABLED
t
PZH
OUTPUT HIGH
TO OFF
OUTPUTS
ENABLED
OUTPUT LOW
TO OFF
t
PHZ
90%
(Continued)
t
r
V
CC
GND
t
PLZ
OUTPUT
DISABLE
6ns
t
f
2.7
1.3
6ns
3V
0.3
t
PZL
GND
6ns
t
PLZ
OUTPUT LOW
TO OFF
10%
t
PZH
1.3V
1.3V
OUTPUTS
DISABLED
OUTPUTS
ENABLED
FIGURE 7. HC THREE-STATE PROPAGATION DELAY
WAVEFORM
FIGURE 8. HCT THREE-STATE PROPAGATION DELAY
WAVEFORM
OTHER
INPUTS
TIED HIGH
OR LOW
OUTPUT
DISABLE
IC WITH
THREE-
STATE
OUTPUT
OUTPUT
R
L
= 1kΩ
C
L
50pF
V
CC
FOR t
PLZ
AND t
PZL
GND FOR t
PHZ
AND t
PZH
NOTE: Open drain waveforms t
PLZ
and t
PZL
are the same as those for three-state shown on the left. The test circuit is Output R
L
= 1kΩ to
V
CC
, C
L
= 50pF.
FIGURE 9. HC AND HCT THREE-STATE PROPAGATION DELAY TEST CIRCUIT
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