HM628512LP-7A 参数 Datasheet PDF下载

HM628512 Series

Write Timing Waveform (2)

(OE Low Fixed)

t

WC

Address

t

CW

t

WR

CS

*1

t

AW

t

WP

WE

t

AS

t

WHZ

t

OW

t

OH

*2

*3

Dout

t

DW

Din

t

DH

*4

Valid Data

Notes: 1. If the CS low transition occurs simultaneously with the WE low transition or after the WE

transition, the output remain in a high impedance state.

2. Dout is the same phase of the write data of this write cycle.

3. Dout is the read data of next address.

4. If CS is low during this period, I/O pins are in the output state. Therefore, the input signals

of the opposite phase to the outputs must not be applied to them.

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