HM6264B Series
Write Timing Waveform (2)
(OE Low Fixed) (OE = V
IL
)
t
WC
Address
Valid address
t
AW
t
CW
CS1
*1
t
WR
CS2
t
WP
WE
t
AS
t
WHZ
Dout
t
OW
*2
*3
t
OH
t
DW
High Impedance
t
DH
*4
Din
Notes:
1.
2.
3.
4.
Valid data
If
CS1
goes low simultaneously with
WE
going low or after
WE
goes low, the outputs
remain in high impedance state.
Dout is the same phase of the written data in this write cycle.
Dout is the read data of the next address.
If
CS1
is low and CS2 is high during this period, I/O pins are in the output state. Input
signals of opposite phase to the outputs must not be applied to I/O pins.